Analysis & Synthesis report for AID_AIDA_FEB
Fri Apr 28 07:34:34 2017
Quartus II 64-Bit Version 14.0.0 Build 200 06/17/2014 SJ Full Version


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; Table of Contents ;
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  1. Legal Notice
  2. Analysis & Synthesis Summary
  3. Analysis & Synthesis Settings
  4. Parallel Compilation
  5. Analysis & Synthesis Source Files Read
  6. Analysis & Synthesis IP Cores Summary
  7. Partition Status Summary
  8. Partition for Top-Level Resource Utilization by Entity
  9. State Machine - |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM|sl_int_mux
 10. State Machine - |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM|sl_int_state
 11. State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_state
 12. State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER|sl_int_state
 13. State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_state
 14. State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET|sl_int_state
 15. State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_state
 16. State Machine - |AID_AIDA_FEB|AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_state
 17. State Machine - |AID_AIDA_FEB|AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL|sl_int_state
 18. State Machine - |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|sl_int_state
 19. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_watchdog_state
 20. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_send_state
 21. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state
 22. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_state[0]
 23. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_state[1]
 24. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_state
 25. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver|sl_int_state
 26. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_state
 27. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_state
 28. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|sl_int_state
 29. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX|sl_int_state
 30. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX|sl_int_state
 31. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX|sl_int_state
 32. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|sl_int_state
 33. State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX|sl_int_state
 34. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_state
 35. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER|sl_int_state
 36. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_process_state
 37. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_state
 38. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_state
 39. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC|sl_int_state
 40. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|sl_int_start_state
 41. State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|sl_int_state
 42. Registers Protected by Synthesis
 43. Logic Cells Representing Combinational Loops
 44. Registers Removed During Synthesis
 45. Removed Registers Triggering Further Register Optimizations
 46. Multiplexer Restructuring Statistics (Restructuring Performed)
 47. Source assignments for Top-level Entity: |AID_AIDA_FEB
 48. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component
 49. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component|ddio_out_dri:auto_generated
 50. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component
 51. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated
 52. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_d96:rdptr_g1p
 53. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_9nb:wrptr_g1p
 54. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|altsyncram_kv61:fifo_ram
 55. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_brp
 56. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_bwp
 57. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp
 58. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp|dffpipe_0v8:dffpipe13
 59. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_brp
 60. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_bwp
 61. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp
 62. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp|dffpipe_1v8:dffpipe16
 63. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated
 64. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_en6:rdptr_g1p
 65. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_b5c:wrptr_g1p
 66. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|altsyncram_rh91:fifo_ram
 67. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp
 68. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp|dffpipe_fd9:dffpipe12
 69. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_brp
 70. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_bwp
 71. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp
 72. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp|dffpipe_gd9:dffpipe16
 73. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|cntr_qld:cntr_b
 74. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated
 75. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_fn6:rdptr_g1p
 76. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_a5c:wrptr_g1p
 77. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|altsyncram_sh91:fifo_ram
 78. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp
 79. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp|dffpipe_hd9:dffpipe12
 80. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp
 81. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp|dffpipe_id9:dffpipe15
 82. Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|cntr_qld:cntr_b
 83. Source assignments for AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component|altsyncram_glu3:auto_generated
 84. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1
 85. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1
 86. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1
 87. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1
 88. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1
 89. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1
 90. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram|altsyncram_f0s1:altsyncram1
 91. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram|altsyncram_f0s1:altsyncram1
 92. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component
 93. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component|ddio_in_0ai:auto_generated
 94. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM
 95. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER
 96. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component
 97. Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component|ddio_out_dri:auto_generated
 98. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component
 99. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated
100. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_so6:rdptr_g1p
101. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_o6c:wrptr_g1p
102. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|altsyncram_2m91:fifo_ram
103. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:rs_brp
104. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:rs_bwp
105. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp
106. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp|dffpipe_se9:dffpipe13
107. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_brp
108. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_bwp
109. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp
110. Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp|dffpipe_te9:dffpipe16
111. Source assignments for AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL
112. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET
113. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component
114. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated
115. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_dn6:rdptr_g1p
116. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_95c:wrptr_g1p
117. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|altsyncram_8g91:fifo_ram
118. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp
119. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp|dffpipe_ld9:dffpipe10
120. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_brp
121. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_bwp
122. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp
123. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp|dffpipe_nd9:dffpipe14
124. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component
125. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated
126. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_dn6:rdptr_g1p
127. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_95c:wrptr_g1p
128. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|altsyncram_8g91:fifo_ram
129. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp
130. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp|dffpipe_ld9:dffpipe10
131. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_brp
132. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_bwp
133. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp
134. Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp|dffpipe_nd9:dffpipe14
135. Source assignments for AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram|altsyncram_h0s1:altsyncram1
136. Source assignments for AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram|altsyncram_h0s1:altsyncram1
137. Parameter Settings for User Entity Instance: AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst|altera_pll:altera_pll_i
138. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB
139. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB
140. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component
141. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component
142. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC
143. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC
144. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER
145. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER
146. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART
147. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1
148. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART
149. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN
150. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER
151. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER
152. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component
153. Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component
154. Parameter Settings for User Entity Instance: AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component
155. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER
156. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM
157. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX
158. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX
159. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX
160. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX
161. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX
162. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX
163. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX
164. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX
165. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component
166. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component
167. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component
168. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component
169. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component
170. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component
171. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component
172. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component
173. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC
174. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component
175. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver
176. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM
177. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER
178. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init
179. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component
180. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM
181. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
182. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
183. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
184. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
185. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
186. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
187. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER
188. Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER
189. Parameter Settings for User Entity Instance: AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component
190. Parameter Settings for User Entity Instance: AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL
191. Parameter Settings for User Entity Instance: AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL
192. Parameter Settings for User Entity Instance: AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL
193. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON
194. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET
195. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET
196. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY
197. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|U_OnePulse:C_BDRATE_PULSE
198. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART
199. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1
200. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART
201. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN
202. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER
203. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER
204. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component
205. Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component
206. Parameter Settings for User Entity Instance: UFP_USER_SETGET_ACK:C_GET_ACK
207. Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER
208. Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters
209. Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters|U_OnePulse:C_pulseSpill
210. Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component
211. Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component
212. Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM
213. Parameter Settings for User Entity Instance: U_OnePulse:C_GLOBAL_TRIG_PULSE_DCO
214. Partition Dependent Files
215. Post-Synthesis Netlist Statistics for Top Partition
216. Partition "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER" Resource Utilization by Entity
217. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX|sl_int_state
218. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX|sl_int_state
219. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX|sl_int_state
220. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX|sl_int_state
221. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX|sl_int_state
222. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX|sl_int_state
223. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX|sl_int_state
224. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX|sl_int_state
225. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX|sl_int_state
226. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX|sl_int_state
227. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX|sl_int_state
228. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX|sl_int_state
229. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX|sl_int_state
230. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX|sl_int_state
231. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX|sl_int_state
232. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX|sl_int_state
233. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX|sl_int_state
234. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX|sl_int_state
235. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX|sl_int_state
236. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX|sl_int_state
237. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX|sl_int_state
238. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX|sl_int_state
239. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX|sl_int_state
240. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX|sl_int_state
241. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX|sl_int_state
242. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX|sl_int_state
243. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX|sl_int_state
244. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX|sl_int_state
245. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX|sl_int_state
246. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX|sl_int_state
247. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX|sl_int_state
248. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX|sl_int_state
249. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX|sl_int_state
250. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX|sl_int_state
251. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX|sl_int_state
252. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX|sl_int_state
253. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX|sl_int_state
254. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX|sl_int_state
255. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX|sl_int_state
256. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX|sl_int_state
257. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX|sl_int_state
258. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX|sl_int_state
259. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX|sl_int_state
260. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX|sl_int_state
261. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX|sl_int_state
262. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX|sl_int_state
263. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX|sl_int_state
264. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX|sl_int_state
265. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX|sl_int_state
266. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX|sl_int_state
267. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX|sl_int_state
268. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX|sl_int_state
269. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX|sl_int_state
270. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX|sl_int_state
271. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX|sl_int_state
272. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX|sl_int_state
273. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX|sl_int_state
274. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX|sl_int_state
275. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX|sl_int_state
276. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX|sl_int_state
277. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX|sl_int_state
278. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX|sl_int_state
279. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX|sl_int_state
280. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX|sl_int_state
281. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX|sl_int_state
282. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX|sl_int_state
283. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX|sl_int_state
284. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX|sl_int_state
285. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX|sl_int_state
286. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX|sl_int_state
287. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX|sl_int_state
288. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX|sl_int_state
289. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX|sl_int_state
290. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX|sl_int_state
291. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX|sl_int_state
292. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX|sl_int_state
293. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX|sl_int_state
294. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX|sl_int_state
295. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX|sl_int_state
296. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX|sl_int_state
297. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX|sl_int_state
298. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX|sl_int_state
299. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX|sl_int_state
300. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX|sl_int_state
301. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX|sl_int_state
302. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX|sl_int_state
303. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX|sl_int_state
304. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX|sl_int_state
305. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX|sl_int_state
306. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX|sl_int_state
307. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX|sl_int_state
308. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX|sl_int_state
309. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX|sl_int_state
310. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX|sl_int_state
311. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX|sl_int_state
312. State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX|sl_int_state
313. Registers Protected by Synthesis
314. Logic Cells Representing Combinational Loops
315. Registers Duplicated to Honor Maximum Fanout Requirements
316. Registers Removed During Synthesis
317. Multiplexer Restructuring Statistics (Restructuring Performed)
318. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER
319. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER
320. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC
321. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component
322. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
323. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
324. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
325. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
326. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
327. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
328. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
329. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
330. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
331. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component
332. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
333. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
334. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
335. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
336. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
337. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
338. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
339. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
340. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
341. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component
342. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
343. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
344. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
345. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
346. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
347. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
348. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
349. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
350. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
351. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component
352. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
353. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
354. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
355. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
356. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
357. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
358. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
359. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
360. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
361. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component
362. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
363. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
364. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
365. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
366. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
367. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
368. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
369. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
370. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
371. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component
372. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
373. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
374. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
375. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
376. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
377. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
378. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
379. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
380. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
381. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component
382. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
383. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
384. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
385. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
386. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
387. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
388. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
389. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
390. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
391. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component
392. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
393. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
394. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
395. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
396. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
397. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
398. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
399. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
400. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
401. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component
402. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
403. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
404. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
405. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
406. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
407. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
408. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
409. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
410. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
411. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component
412. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
413. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
414. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
415. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
416. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
417. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
418. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
419. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
420. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
421. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component
422. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
423. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
424. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
425. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
426. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
427. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
428. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
429. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
430. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
431. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component
432. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
433. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
434. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
435. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
436. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
437. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
438. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
439. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
440. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
441. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component
442. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
443. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
444. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
445. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
446. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
447. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
448. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
449. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
450. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
451. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component
452. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
453. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
454. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
455. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
456. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
457. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
458. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
459. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
460. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
461. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component
462. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
463. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
464. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
465. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
466. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
467. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
468. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
469. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
470. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
471. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component
472. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
473. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
474. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
475. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
476. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
477. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
478. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
479. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
480. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
481. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component
482. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
483. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
484. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
485. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
486. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
487. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
488. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
489. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
490. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
491. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component
492. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
493. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
494. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
495. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
496. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
497. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
498. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
499. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
500. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
501. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component
502. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
503. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
504. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
505. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
506. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
507. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
508. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
509. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
510. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
511. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component
512. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
513. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
514. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
515. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
516. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
517. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
518. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
519. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
520. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
521. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component
522. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
523. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
524. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
525. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
526. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
527. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
528. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
529. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
530. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
531. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component
532. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
533. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
534. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
535. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
536. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
537. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
538. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
539. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
540. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
541. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component
542. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
543. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
544. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
545. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
546. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
547. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
548. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
549. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
550. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
551. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component
552. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
553. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
554. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
555. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
556. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
557. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
558. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
559. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
560. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
561. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component
562. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
563. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
564. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
565. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
566. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
567. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
568. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
569. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
570. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
571. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component
572. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
573. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
574. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
575. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
576. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
577. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
578. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
579. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
580. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
581. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component
582. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
583. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
584. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
585. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
586. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
587. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
588. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
589. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
590. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
591. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component
592. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
593. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
594. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
595. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
596. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
597. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
598. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
599. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
600. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
601. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component
602. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
603. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
604. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
605. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
606. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
607. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
608. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
609. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
610. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
611. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component
612. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
613. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
614. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
615. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
616. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
617. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
618. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
619. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
620. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
621. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component
622. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
623. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
624. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
625. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
626. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
627. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
628. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
629. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
630. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
631. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component
632. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
633. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
634. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
635. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
636. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
637. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
638. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
639. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
640. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
641. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component
642. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
643. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
644. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
645. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
646. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
647. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
648. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
649. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
650. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
651. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component
652. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
653. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
654. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
655. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
656. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
657. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
658. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
659. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
660. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
661. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component
662. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
663. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
664. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
665. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
666. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
667. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
668. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
669. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
670. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
671. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component
672. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
673. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
674. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
675. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
676. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
677. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
678. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
679. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
680. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
681. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component
682. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
683. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
684. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
685. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
686. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
687. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
688. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
689. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
690. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
691. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component
692. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
693. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
694. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
695. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
696. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
697. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
698. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
699. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
700. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
701. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component
702. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
703. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
704. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
705. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
706. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
707. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
708. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
709. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
710. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
711. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component
712. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
713. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
714. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
715. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
716. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
717. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
718. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
719. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
720. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
721. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component
722. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
723. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
724. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
725. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
726. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
727. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
728. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
729. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
730. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
731. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component
732. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
733. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
734. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
735. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
736. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
737. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
738. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
739. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
740. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
741. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component
742. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
743. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
744. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
745. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
746. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
747. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
748. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
749. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
750. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
751. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component
752. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
753. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
754. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
755. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
756. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
757. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
758. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
759. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
760. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
761. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component
762. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
763. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
764. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
765. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
766. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
767. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
768. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
769. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
770. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
771. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component
772. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
773. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
774. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
775. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
776. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
777. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
778. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
779. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
780. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
781. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component
782. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
783. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
784. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
785. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
786. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
787. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
788. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
789. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
790. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
791. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component
792. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
793. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
794. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
795. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
796. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
797. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
798. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
799. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
800. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
801. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component
802. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
803. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
804. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
805. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
806. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
807. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
808. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
809. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
810. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
811. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component
812. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
813. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
814. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
815. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
816. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
817. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
818. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
819. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
820. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
821. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component
822. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
823. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
824. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
825. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
826. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
827. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
828. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
829. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
830. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
831. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component
832. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
833. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
834. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
835. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
836. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
837. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
838. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
839. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
840. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
841. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component
842. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
843. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
844. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
845. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
846. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
847. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
848. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
849. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
850. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
851. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component
852. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
853. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
854. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
855. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
856. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
857. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
858. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
859. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
860. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
861. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component
862. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
863. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
864. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
865. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
866. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
867. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
868. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
869. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
870. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
871. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component
872. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
873. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
874. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
875. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
876. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
877. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
878. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
879. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
880. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
881. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component
882. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
883. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
884. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
885. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
886. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
887. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
888. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
889. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
890. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
891. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component
892. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
893. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
894. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
895. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
896. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
897. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
898. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
899. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
900. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
901. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component
902. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
903. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
904. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
905. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
906. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
907. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
908. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
909. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
910. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
911. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component
912. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
913. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
914. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
915. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
916. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
917. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
918. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
919. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
920. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
921. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component
922. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
923. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
924. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
925. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
926. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
927. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
928. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
929. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
930. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
931. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component
932. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
933. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
934. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
935. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
936. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
937. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
938. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
939. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
940. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
941. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component
942. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
943. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
944. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
945. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
946. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
947. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
948. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
949. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
950. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
951. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component
952. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
953. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
954. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
955. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
956. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
957. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
958. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
959. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
960. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
961. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component
962. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
963. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
964. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
965. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
966. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
967. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
968. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
969. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
970. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
971. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component
972. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
973. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
974. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
975. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
976. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
977. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
978. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
979. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
980. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
981. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component
982. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
983. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
984. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
985. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
986. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
987. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
988. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
989. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
990. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
991. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component
992. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
993. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
994. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
995. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
996. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
997. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
998. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
999. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1000. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1001. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component
1002. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1003. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1004. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1005. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1006. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1007. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1008. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1009. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1010. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1011. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component
1012. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1013. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1014. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1015. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1016. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1017. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1018. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1019. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1020. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1021. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component
1022. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1023. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1024. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1025. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1026. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1027. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1028. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1029. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1030. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1031. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component
1032. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1033. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1034. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1035. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1036. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1037. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1038. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1039. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1040. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1041. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component
1042. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1043. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1044. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1045. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1046. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1047. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1048. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1049. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1050. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1051. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component
1052. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1053. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1054. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1055. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1056. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1057. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1058. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1059. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1060. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1061. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component
1062. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1063. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1064. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1065. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1066. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1067. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1068. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1069. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1070. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1071. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component
1072. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1073. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1074. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1075. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1076. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1077. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1078. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1079. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1080. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1081. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component
1082. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1083. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1084. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1085. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1086. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1087. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1088. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1089. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1090. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1091. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component
1092. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1093. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1094. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1095. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1096. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1097. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1098. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1099. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1100. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1101. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component
1102. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1103. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1104. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1105. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1106. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1107. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1108. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1109. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1110. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1111. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component
1112. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1113. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1114. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1115. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1116. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1117. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1118. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1119. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1120. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1121. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component
1122. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1123. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1124. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1125. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1126. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1127. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1128. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1129. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1130. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1131. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component
1132. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1133. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1134. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1135. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1136. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1137. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1138. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1139. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1140. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1141. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component
1142. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1143. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1144. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1145. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1146. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1147. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1148. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1149. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1150. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1151. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component
1152. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1153. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1154. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1155. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1156. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1157. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1158. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1159. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1160. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1161. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component
1162. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1163. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1164. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1165. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1166. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1167. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1168. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1169. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1170. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1171. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component
1172. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1173. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1174. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1175. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1176. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1177. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1178. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1179. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1180. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1181. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component
1182. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1183. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1184. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1185. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1186. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1187. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1188. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1189. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1190. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1191. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component
1192. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1193. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1194. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1195. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1196. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1197. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1198. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1199. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1200. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1201. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component
1202. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1203. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1204. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1205. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1206. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1207. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1208. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1209. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1210. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1211. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component
1212. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1213. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1214. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1215. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1216. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1217. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1218. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1219. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1220. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1221. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component
1222. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1223. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1224. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1225. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1226. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1227. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1228. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1229. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1230. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1231. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component
1232. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1233. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1234. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1235. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1236. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1237. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1238. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1239. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1240. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1241. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component
1242. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1243. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1244. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1245. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1246. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1247. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1248. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1249. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1250. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1251. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component
1252. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1253. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1254. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1255. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1256. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1257. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1258. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1259. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1260. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1261. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component
1262. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1263. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1264. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1265. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1266. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1267. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1268. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1269. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1270. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1271. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component
1272. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated
1273. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p
1274. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p
1275. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp
1276. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp
1277. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp
1278. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10
1279. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp
1280. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13
1281. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component
1282. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated
1283. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_bn6:rdptr_g1p
1284. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_75c:wrptr_g1p
1285. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_brp
1286. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_bwp
1287. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp
1288. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp|dffpipe_jd9:dffpipe10
1289. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp
1290. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp|dffpipe_kd9:dffpipe13
1291. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1292. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1293. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1294. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1295. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1296. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1297. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1298. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1299. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1300. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1301. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1302. Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1
1303. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER
1304. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER
1305. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC
1306. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:0:C_GTRIG_PULSEX
1307. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:1:C_GTRIG_PULSEX
1308. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:2:C_GTRIG_PULSEX
1309. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:3:C_GTRIG_PULSEX
1310. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:4:C_GTRIG_PULSEX
1311. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:5:C_GTRIG_PULSEX
1312. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:6:C_GTRIG_PULSEX
1313. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:7:C_GTRIG_PULSEX
1314. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:8:C_GTRIG_PULSEX
1315. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:9:C_GTRIG_PULSEX
1316. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:10:C_GTRIG_PULSEX
1317. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:11:C_GTRIG_PULSEX
1318. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:12:C_GTRIG_PULSEX
1319. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:13:C_GTRIG_PULSEX
1320. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:14:C_GTRIG_PULSEX
1321. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:15:C_GTRIG_PULSEX
1322. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:16:C_GTRIG_PULSEX
1323. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:17:C_GTRIG_PULSEX
1324. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:18:C_GTRIG_PULSEX
1325. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:19:C_GTRIG_PULSEX
1326. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:20:C_GTRIG_PULSEX
1327. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:21:C_GTRIG_PULSEX
1328. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:22:C_GTRIG_PULSEX
1329. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:23:C_GTRIG_PULSEX
1330. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:24:C_GTRIG_PULSEX
1331. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:25:C_GTRIG_PULSEX
1332. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:26:C_GTRIG_PULSEX
1333. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:27:C_GTRIG_PULSEX
1334. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:28:C_GTRIG_PULSEX
1335. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:29:C_GTRIG_PULSEX
1336. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:30:C_GTRIG_PULSEX
1337. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:31:C_GTRIG_PULSEX
1338. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:32:C_GTRIG_PULSEX
1339. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:33:C_GTRIG_PULSEX
1340. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:34:C_GTRIG_PULSEX
1341. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:35:C_GTRIG_PULSEX
1342. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:36:C_GTRIG_PULSEX
1343. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:37:C_GTRIG_PULSEX
1344. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:38:C_GTRIG_PULSEX
1345. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:39:C_GTRIG_PULSEX
1346. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:40:C_GTRIG_PULSEX
1347. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:41:C_GTRIG_PULSEX
1348. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:42:C_GTRIG_PULSEX
1349. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:43:C_GTRIG_PULSEX
1350. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:44:C_GTRIG_PULSEX
1351. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:45:C_GTRIG_PULSEX
1352. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:46:C_GTRIG_PULSEX
1353. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:47:C_GTRIG_PULSEX
1354. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:48:C_GTRIG_PULSEX
1355. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:49:C_GTRIG_PULSEX
1356. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:50:C_GTRIG_PULSEX
1357. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:51:C_GTRIG_PULSEX
1358. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:52:C_GTRIG_PULSEX
1359. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:53:C_GTRIG_PULSEX
1360. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:54:C_GTRIG_PULSEX
1361. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:55:C_GTRIG_PULSEX
1362. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:56:C_GTRIG_PULSEX
1363. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:57:C_GTRIG_PULSEX
1364. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:58:C_GTRIG_PULSEX
1365. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:59:C_GTRIG_PULSEX
1366. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:60:C_GTRIG_PULSEX
1367. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:61:C_GTRIG_PULSEX
1368. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:62:C_GTRIG_PULSEX
1369. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:63:C_GTRIG_PULSEX
1370. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:64:C_GTRIG_PULSEX
1371. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:65:C_GTRIG_PULSEX
1372. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:66:C_GTRIG_PULSEX
1373. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:67:C_GTRIG_PULSEX
1374. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:68:C_GTRIG_PULSEX
1375. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:69:C_GTRIG_PULSEX
1376. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:70:C_GTRIG_PULSEX
1377. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:71:C_GTRIG_PULSEX
1378. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:72:C_GTRIG_PULSEX
1379. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:73:C_GTRIG_PULSEX
1380. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:74:C_GTRIG_PULSEX
1381. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:75:C_GTRIG_PULSEX
1382. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:76:C_GTRIG_PULSEX
1383. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:77:C_GTRIG_PULSEX
1384. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:78:C_GTRIG_PULSEX
1385. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:79:C_GTRIG_PULSEX
1386. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:80:C_GTRIG_PULSEX
1387. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:81:C_GTRIG_PULSEX
1388. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:82:C_GTRIG_PULSEX
1389. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:83:C_GTRIG_PULSEX
1390. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:84:C_GTRIG_PULSEX
1391. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:85:C_GTRIG_PULSEX
1392. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:86:C_GTRIG_PULSEX
1393. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:87:C_GTRIG_PULSEX
1394. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:88:C_GTRIG_PULSEX
1395. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:89:C_GTRIG_PULSEX
1396. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:90:C_GTRIG_PULSEX
1397. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:91:C_GTRIG_PULSEX
1398. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:92:C_GTRIG_PULSEX
1399. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:93:C_GTRIG_PULSEX
1400. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:94:C_GTRIG_PULSEX
1401. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:95:C_GTRIG_PULSEX
1402. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:96:C_GTRIG_PULSEX
1403. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX
1404. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX
1405. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX
1406. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX
1407. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX
1408. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX
1409. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX
1410. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX
1411. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX
1412. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX
1413. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX
1414. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX
1415. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX
1416. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX
1417. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX
1418. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX
1419. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX
1420. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX
1421. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX
1422. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX
1423. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX
1424. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX
1425. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX
1426. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX
1427. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX
1428. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX
1429. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX
1430. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX
1431. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX
1432. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX
1433. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX
1434. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX
1435. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX
1436. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX
1437. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX
1438. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX
1439. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX
1440. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX
1441. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX
1442. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX
1443. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX
1444. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX
1445. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX
1446. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX
1447. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX
1448. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX
1449. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX
1450. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX
1451. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX
1452. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX
1453. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX
1454. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX
1455. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX
1456. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX
1457. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX
1458. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX
1459. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX
1460. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX
1461. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX
1462. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX
1463. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX
1464. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX
1465. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX
1466. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX
1467. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX
1468. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX
1469. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX
1470. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX
1471. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX
1472. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX
1473. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX
1474. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX
1475. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX
1476. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX
1477. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX
1478. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX
1479. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX
1480. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX
1481. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX
1482. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX
1483. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX
1484. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX
1485. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX
1486. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX
1487. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX
1488. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX
1489. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX
1490. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX
1491. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX
1492. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX
1493. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX
1494. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX
1495. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX
1496. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX
1497. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX
1498. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX
1499. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1500. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:1:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1501. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:2:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1502. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:3:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1503. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:4:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1504. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:5:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1505. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:6:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1506. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:7:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1507. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:8:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1508. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:9:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1509. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:10:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1510. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:11:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1511. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:12:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1512. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:13:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1513. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:14:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1514. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:15:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1515. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:16:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1516. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:17:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1517. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:18:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1518. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:19:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1519. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:20:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1520. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:21:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1521. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:22:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1522. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:23:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1523. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:24:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1524. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:25:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1525. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:26:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1526. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:27:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1527. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:28:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1528. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:29:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1529. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:30:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1530. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:31:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1531. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:32:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1532. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:33:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1533. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:34:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1534. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:35:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1535. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:36:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1536. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:37:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1537. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:38:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1538. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:39:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1539. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:40:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1540. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:41:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1541. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:42:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1542. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:43:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1543. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:44:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1544. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:45:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1545. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:46:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1546. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:47:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1547. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:48:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1548. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:49:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1549. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:50:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1550. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:51:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1551. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:52:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1552. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:53:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1553. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:54:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1554. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:55:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1555. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:56:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1556. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:57:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1557. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:58:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1558. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:59:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1559. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:60:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1560. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:61:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1561. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:62:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1562. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:63:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1563. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:64:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1564. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:65:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1565. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:66:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1566. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:67:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1567. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:68:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1568. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:69:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1569. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:70:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1570. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:71:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1571. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:72:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1572. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:73:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1573. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:74:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1574. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:75:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1575. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:76:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1576. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:77:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1577. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:78:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1578. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:79:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1579. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:80:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1580. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:81:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1581. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:82:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1582. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:83:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1583. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:84:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1584. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:85:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1585. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:86:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1586. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:87:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1587. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:88:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1588. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:89:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1589. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:90:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1590. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:91:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1591. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:92:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1592. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:93:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1593. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:94:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1594. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:95:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component
1595. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component
1596. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component
1597. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component
1598. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component
1599. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component
1600. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component
1601. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component
1602. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component
1603. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component
1604. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component
1605. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component
1606. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component
1607. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component
1608. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component
1609. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component
1610. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component
1611. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component
1612. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component
1613. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component
1614. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component
1615. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component
1616. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component
1617. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component
1618. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component
1619. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component
1620. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component
1621. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component
1622. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component
1623. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component
1624. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component
1625. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component
1626. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component
1627. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component
1628. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component
1629. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component
1630. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component
1631. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component
1632. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component
1633. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component
1634. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component
1635. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component
1636. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component
1637. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component
1638. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component
1639. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component
1640. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component
1641. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component
1642. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component
1643. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component
1644. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component
1645. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component
1646. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component
1647. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component
1648. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component
1649. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component
1650. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component
1651. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component
1652. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component
1653. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component
1654. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component
1655. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component
1656. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component
1657. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component
1658. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component
1659. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component
1660. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component
1661. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component
1662. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component
1663. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component
1664. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component
1665. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component
1666. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component
1667. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component
1668. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component
1669. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component
1670. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component
1671. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component
1672. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component
1673. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component
1674. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component
1675. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component
1676. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component
1677. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component
1678. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component
1679. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component
1680. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component
1681. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component
1682. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component
1683. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component
1684. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component
1685. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component
1686. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component
1687. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component
1688. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component
1689. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component
1690. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component
1691. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component
1692. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component
1693. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component
1694. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component
1695. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component
1696. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component
1697. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component
1698. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component
1699. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component
1700. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component
1701. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component
1702. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component
1703. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component
1704. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX
1705. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1706. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1707. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1708. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1709. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1710. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1711. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1712. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1713. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX
1714. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1715. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1716. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1717. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1718. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1719. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1720. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1721. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1722. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX
1723. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1724. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1725. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1726. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1727. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1728. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1729. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1730. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1731. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX
1732. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1733. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1734. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1735. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1736. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1737. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1738. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1739. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1740. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX
1741. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1742. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1743. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1744. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1745. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1746. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1747. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1748. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1749. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX
1750. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1751. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1752. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1753. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1754. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1755. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1756. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1757. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1758. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX
1759. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1760. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1761. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1762. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1763. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1764. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1765. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1766. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1767. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX
1768. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1769. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1770. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1771. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1772. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1773. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1774. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1775. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1776. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX
1777. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1778. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1779. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1780. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1781. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1782. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1783. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1784. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1785. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX
1786. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1787. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1788. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1789. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1790. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1791. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1792. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1793. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1794. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX
1795. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1796. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1797. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1798. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1799. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1800. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1801. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1802. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1803. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX
1804. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1805. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1806. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1807. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1808. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1809. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1810. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER
1811. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER
1812. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM
1813. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX
1814. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX
1815. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX
1816. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX
1817. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX
1818. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX
1819. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:7:C_RX
1820. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:8:C_RX
1821. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:9:C_RX
1822. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:10:C_RX
1823. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER
1824. Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER
1825. Partition Dependent Files
1826. Post-Synthesis Netlist Statistics for Partition AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER
1827. Port Connectivity Checks: "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a"
1828. Port Connectivity Checks: "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h"
1829. Port Connectivity Checks: "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER"
1830. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER"
1831. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER"
1832. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:10:C_RX"
1833. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:9:C_RX"
1834. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:8:C_RX"
1835. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:7:C_RX"
1836. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1837. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1838. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1839. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1840. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1841. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1842. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM"
1843. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1844. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1845. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1846. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1847. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1848. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1849. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1850. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1851. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1852. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1853. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1854. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1855. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1856. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1857. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1858. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1859. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1860. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1861. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1862. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1863. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1864. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1865. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1866. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1867. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1868. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1869. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1870. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1871. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1872. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1873. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1874. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1875. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1876. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1877. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1878. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1879. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1880. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1881. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1882. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1883. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1884. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1885. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1886. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1887. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1888. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1889. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1890. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1891. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1892. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1893. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1894. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1895. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1896. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1897. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1898. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1899. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1900. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1901. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1902. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1903. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1904. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1905. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1906. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1907. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1908. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1909. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1910. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1911. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1912. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1913. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1914. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1915. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1916. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1917. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1918. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1919. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1920. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1921. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1922. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1923. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1924. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1925. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1926. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1927. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1928. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1929. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1930. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1931. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER"
1932. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER"
1933. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1934. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1935. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1936. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1937. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1938. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1939. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC"
1940. Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER"
1941. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX"
1942. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER"
1943. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER"
1944. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN"
1945. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART"
1946. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY"
1947. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET"
1948. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET"
1949. Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON"
1950. Port Connectivity Checks: "AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL"
1951. Port Connectivity Checks: "AID_L2_FIFO:C_FIFO_L2"
1952. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER"
1953. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER"
1954. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX"
1955. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX"
1956. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX"
1957. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX"
1958. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX"
1959. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
1960. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM"
1961. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK"
1962. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM"
1963. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver"
1964. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX"
1965. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX"
1966. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX"
1967. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX"
1968. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX"
1969. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX"
1970. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX"
1971. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX"
1972. Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER"
1973. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER"
1974. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER"
1975. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN"
1976. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART"
1977. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER"
1978. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC"
1979. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK"
1980. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB"
1981. Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB"
1982. Elapsed Time Per Partition
1983. Analysis & Synthesis Messages



----------------
; Legal Notice ;
----------------
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devices manufactured by Altera and sold by Altera or its 
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agreement for further details.



+-------------------------------------------------------------------------------+
; Analysis & Synthesis Summary                                                  ;
+---------------------------------+---------------------------------------------+
; Analysis & Synthesis Status     ; Successful - Fri Apr 28 07:34:34 2017       ;
; Quartus II 64-Bit Version       ; 14.0.0 Build 200 06/17/2014 SJ Full Version ;
; Revision Name                   ; AID_AIDA_FEB                                ;
; Top-level Entity Name           ; AID_AIDA_FEB                                ;
; Family                          ; Arria V                                     ;
; Logic utilization (in ALMs)     ; N/A until Partition Merge                   ;
; Total registers                 ; N/A until Partition Merge                   ;
; Total pins                      ; N/A until Partition Merge                   ;
; Total virtual pins              ; N/A until Partition Merge                   ;
; Total block memory bits         ; N/A until Partition Merge                   ;
; Total DSP Blocks                ; N/A until Partition Merge                   ;
; Total HSSI RX PCSs              ; N/A until Partition Merge                   ;
; Total HSSI PMA RX Deserializers ; N/A until Partition Merge                   ;
; Total HSSI TX PCSs              ; N/A until Partition Merge                   ;
; Total HSSI PMA TX Serializers   ; N/A until Partition Merge                   ;
; Total PLLs                      ; N/A until Partition Merge                   ;
; Total DLLs                      ; N/A until Partition Merge                   ;
+---------------------------------+---------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Settings                                                                                             ;
+---------------------------------------------------------------------------------+--------------------+--------------------+
; Option                                                                          ; Setting            ; Default Value      ;
+---------------------------------------------------------------------------------+--------------------+--------------------+
; Device                                                                          ; 5AGXBA5D4F31C4     ;                    ;
; Top-level entity name                                                           ; AID_AIDA_FEB       ; AID_AIDA_FEB       ;
; Family name                                                                     ; Arria V            ; Cyclone IV GX      ;
; VHDL Show LMF Mapping Messages                                                  ; Off                ;                    ;
; VHDL Version                                                                    ; VHDL_2008          ; VHDL_1993          ;
; Remove Duplicate Registers                                                      ; Off                ; On                 ;
; Optimization Technique                                                          ; Speed              ; Balanced           ;
; Use smart compilation                                                           ; Off                ; Off                ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation      ; On                 ; On                 ;
; Enable compact report table                                                     ; Off                ; Off                ;
; Restructure Multiplexers                                                        ; Auto               ; Auto               ;
; MLAB Add Timing Constraints For Mixed-Port Feed-Through Mode Setting Don't Care ; Off                ; Off                ;
; Create Debugging Nodes for IP Cores                                             ; Off                ; Off                ;
; Preserve fewer node names                                                       ; On                 ; On                 ;
; Disable OpenCore Plus hardware evaluation                                       ; Off                ; Off                ;
; Verilog Version                                                                 ; Verilog_2001       ; Verilog_2001       ;
; State Machine Processing                                                        ; Auto               ; Auto               ;
; Safe State Machine                                                              ; Off                ; Off                ;
; Extract Verilog State Machines                                                  ; On                 ; On                 ;
; Extract VHDL State Machines                                                     ; On                 ; On                 ;
; Ignore Verilog initial constructs                                               ; Off                ; Off                ;
; Iteration limit for constant Verilog loops                                      ; 5000               ; 5000               ;
; Iteration limit for non-constant Verilog loops                                  ; 250                ; 250                ;
; Add Pass-Through Logic to Inferred RAMs                                         ; On                 ; On                 ;
; Infer RAMs from Raw Logic                                                       ; On                 ; On                 ;
; Parallel Synthesis                                                              ; On                 ; On                 ;
; DSP Block Balancing                                                             ; Auto               ; Auto               ;
; NOT Gate Push-Back                                                              ; On                 ; On                 ;
; Power-Up Don't Care                                                             ; On                 ; On                 ;
; Remove Redundant Logic Cells                                                    ; Off                ; Off                ;
; Ignore CARRY Buffers                                                            ; Off                ; Off                ;
; Ignore CASCADE Buffers                                                          ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                                           ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                                       ; Off                ; Off                ;
; Ignore LCELL Buffers                                                            ; Off                ; Off                ;
; Ignore SOFT Buffers                                                             ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                                                  ; Off                ; Off                ;
; Carry Chain Length                                                              ; 70                 ; 70                 ;
; Auto Carry Chains                                                               ; On                 ; On                 ;
; Auto Open-Drain Pins                                                            ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                                           ; Off                ; Off                ;
; Auto ROM Replacement                                                            ; On                 ; On                 ;
; Auto RAM Replacement                                                            ; On                 ; On                 ;
; Auto DSP Block Replacement                                                      ; On                 ; On                 ;
; Auto Shift Register Replacement                                                 ; Auto               ; Auto               ;
; Allow Shift Register Merging across Hierarchies                                 ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                                   ; On                 ; On                 ;
; Strict RAM Replacement                                                          ; Off                ; Off                ;
; Allow Synchronous Control Signals                                               ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                                          ; Off                ; Off                ;
; Auto Resource Sharing                                                           ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                                              ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                                              ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                                   ; Off                ; Off                ;
; Use LogicLock Constraints during Resource Balancing                             ; On                 ; On                 ;
; Ignore translate_off and synthesis_off directives                               ; Off                ; Off                ;
; Timing-Driven Synthesis                                                         ; On                 ; On                 ;
; Report Parameter Settings                                                       ; On                 ; On                 ;
; Report Source Assignments                                                       ; On                 ; On                 ;
; Report Connectivity Checks                                                      ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                                              ; Off                ; Off                ;
; Synchronization Register Chain Length                                           ; 3                  ; 3                  ;
; PowerPlay Power Optimization                                                    ; Normal compilation ; Normal compilation ;
; HDL message level                                                               ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages                                 ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report                        ; 5000               ; 5000               ;
; Number of Swept Nodes Reported in Synthesis Report                              ; 5000               ; 5000               ;
; Number of Inverted Registers Reported in Synthesis Report                       ; 100                ; 100                ;
; Clock MUX Protection                                                            ; On                 ; On                 ;
; Auto Gated Clock Conversion                                                     ; Off                ; Off                ;
; Block Design Naming                                                             ; Auto               ; Auto               ;
; SDC constraint protection                                                       ; Off                ; Off                ;
; Synthesis Effort                                                                ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal                    ; On                 ; On                 ;
; Pre-Mapping Resynthesis Optimization                                            ; Off                ; Off                ;
; Analysis & Synthesis Message Level                                              ; Medium             ; Medium             ;
; Disable Register Merging Across Hierarchies                                     ; Auto               ; Auto               ;
; Resource Aware Inference For Block RAM                                          ; On                 ; On                 ;
; Synthesis Seed                                                                  ; 1                  ; 1                  ;
; Automatic Parallel Synthesis                                                    ; On                 ; On                 ;
; Partial Reconfiguration Bitstream ID                                            ; Off                ; Off                ;
+---------------------------------------------------------------------------------+--------------------+--------------------+


+------------------------------------------+
; Parallel Compilation                     ;
+----------------------------+-------------+
; Processors                 ; Number      ;
+----------------------------+-------------+
; Number detected on machine ; 4           ;
; Maximum allowed            ; 2           ;
;                            ;             ;
; Average used               ; 1.00        ;
; Maximum used               ; 2           ;
;                            ;             ;
; Usage by Processor         ; % Time Used ;
;     Processor 1            ; 100.0%      ;
;     Processor 2            ; < 0.1%      ;
;     Processors 3-4         ;   0.0%      ;
+----------------------------+-------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                                                                                                    ;
+-----------------------------------------------------------------------------------+-----------------+------------------------------+-------------------------------------------------------------------------------------------+----------+
; File Name with User-Entered Path                                                  ; Used in Netlist ; File Type                    ; File Name with Absolute Path                                                              ; Library  ;
+-----------------------------------------------------------------------------------+-----------------+------------------------------+-------------------------------------------------------------------------------------------+----------+
; ../../../lib/u_util/exp/u_util.vhd                                                ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/u_util/exp/u_util.vhd                                                ;          ;
; ../../../lib/u_util/exp/u_size.vhd                                                ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/u_util/exp/u_size.vhd                                                ;          ;
; ../../../lib/u_util/src/u_edgepulse.vhd                                           ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/u_util/src/u_edgepulse.vhd                                           ;          ;
; ../../../lib/u_util/src/u_onepulse.vhd                                            ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/u_util/src/u_onepulse.vhd                                            ;          ;
; ../../../lib/usb_usb/c_aria5/src/USB_L2_TX_FIFO.vhd                               ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/lib/usb_usb/c_aria5/src/USB_L2_TX_FIFO.vhd                               ;          ;
; ../../../lib/usb_usb/exp/USB_USB.vhd                                              ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/usb_usb/exp/USB_USB.vhd                                              ;          ;
; ../../../lib/usb_usb/c_aria5/src/USB_UC_PCLK.vhd                                  ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/lib/usb_usb/c_aria5/src/USB_UC_PCLK.vhd                                  ;          ;
; ../../../lib/usb_usb/src/USB_USB_Reader.vhd                                       ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/usb_usb/src/USB_USB_Reader.vhd                                       ;          ;
; ../../../lib/ser_serialCommunication/exp/ser_serialCommunication.vhd              ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/exp/ser_serialCommunication.vhd              ;          ;
; ../../../lib/ser_serialCommunication/exp/ser_crc_pck.vhd                          ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/exp/ser_crc_pck.vhd                          ;          ;
; ../../../lib/ser_serialCommunication/src/ser_crc_pck_polynomial.vhd               ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_crc_pck_polynomial.vhd               ;          ;
; ../../../lib/ser_serialCommunication/src/ser_crc.vhd                              ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_crc.vhd                              ;          ;
; ../../../lib/ser_serialCommunication/src/crc_pol/ser_crc_pol16_DIN16_D4_1a2eb.vhd ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/crc_pol/ser_crc_pol16_DIN16_D4_1a2eb.vhd ;          ;
; ../../../lib/ser_serialCommunication/src/ser_uart_ser.vhd                         ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_uart_ser.vhd                         ;          ;
; ../../../lib/ser_serialCommunication/src/ser_uart_deser.vhd                       ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_uart_deser.vhd                       ;          ;
; ../../../lib/ser_serialCommunication/src/ser_data_5_bits_filter.vhd               ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_data_5_bits_filter.vhd               ;          ;
; ../../../lib/ser_serialCommunication/src/ser_uart_bdgen.vhd                       ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_uart_bdgen.vhd                       ;          ;
; ../../../lib/ser_serialCommunication/src/ser_uart.vhd                             ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_uart.vhd                             ;          ;
; ../../../lib/ser_serialCommunication/src/ser_uart_wrapper.vhd                     ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_uart_wrapper.vhd                     ;          ;
; ../../../lib/ser_serialCommunication/src/ser_uart_wrapper32.vhd                   ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_uart_wrapper32.vhd                   ;          ;
; ../../../lib/ser_serialCommunication/src/ser_uart_wrapper8_d4.vhd                 ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/ser_serialCommunication/src/ser_uart_wrapper8_d4.vhd                 ;          ;
; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_TX32.vhd           ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_TX32.vhd           ;          ;
; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_RX32.vhd           ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_RX32.vhd           ;          ;
; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO8_D4.vhd            ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO8_D4.vhd            ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/exp/UFP_UsbFrontEndProtocol.vhd              ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/exp/UFP_UsbFrontEndProtocol.vhd              ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/exp/UFP_fw_version.vhd                       ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/exp/UFP_fw_version.vhd                       ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_Decoder.vhd                          ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/src/UFP_Decoder.vhd                          ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_Encoder_uart.vhd                     ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/src/UFP_Encoder_uart.vhd                     ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_WRAPPER_USB_uart.vhd                 ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/src/UFP_WRAPPER_USB_uart.vhd                 ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_USER_GET_CONFIG.vhd                  ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/src/UFP_USER_GET_CONFIG.vhd                  ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_USER_SET_CONFIG.vhd                  ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/src/UFP_USER_SET_CONFIG.vhd                  ;          ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_USER_SETGET_ACK.vhd                  ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/lib/UFP_UsbFrontEndProtocol/src/UFP_USER_SETGET_ACK.vhd                  ;          ;
; ../src/AID_pll3.vhd                                                               ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_pll3.vhd                                    ; AID_pll3 ;
; ../src/AID_pll3/AID_pll3_0002.v                                                   ; yes             ; User Verilog HDL File        ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_pll3/AID_pll3_0002.v                        ; AID_pll3 ;
; ../src/AID_L0_FIFO.vhd                                                            ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L0_FIFO.vhd                                 ;          ;
; ../src/AID_L0_FIFO_PERIOD.vhd                                                     ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L0_FIFO_PERIOD.vhd                          ;          ;
; ../src/AID_L0_TRIG_DELAY.vhd                                                      ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L0_TRIG_DELAY.vhd                           ;          ;
; ../src/AID_L0_TRIGCOUNTERS.vhd                                                    ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L0_TRIGCOUNTERS.vhd                         ;          ;
; ../src/AID_L0_TC_WRAPPER.vhd                                                      ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L0_TC_WRAPPER.vhd                           ;          ;
; ../src/AID_L1_HOLD_MANAGER.vhd                                                    ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_HOLD_MANAGER.vhd                         ;          ;
; ../src/AID_L1_ADC_DDR.vhd                                                         ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_ADC_DDR.vhd                              ;          ;
; ../src/AID_L1_ADC_Driver.vhd                                                      ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_ADC_Driver.vhd                           ;          ;
; ../src/AID_L1_ADC_SM.vhd                                                          ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_ADC_SM.vhd                               ;          ;
; ../src/AID_L1_Threshold_SM.vhd                                                    ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_Threshold_SM.vhd                         ;          ;
; ../src/AID_L1_SM_READER.vhd                                                       ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_SM_READER.vhd                            ;          ;
; ../src/AID_L1_Counters.vhd                                                        ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_Counters.vhd                             ;          ;
; ../src/AID_L1_TC_SM.vhd                                                           ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_TC_SM.vhd                                ;          ;
; ../src/AID_L1_SM.vhd                                                              ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_SM.vhd                                   ;          ;
; ../src/AID_L1_TC_WRAPPER.vhd                                                      ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_TC_WRAPPER.vhd                           ;          ;
; ../src/AID_L1_FIFO.vhd                                                            ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_FIFO.vhd                                 ;          ;
; ../src/AID_L1_HIT_FIFO.vhd                                                        ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_HIT_FIFO.vhd                             ;          ;
; ../src/AID_L1_FIFO_OTHER.vhd                                                      ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L1_FIFO_OTHER.vhd                           ;          ;
; ../src/AID_L2i_FIFO.vhd                                                           ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2i_FIFO.vhd                                ;          ;
; ../src/AID_L2_DPRAM.vhd                                                           ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_DPRAM.vhd                                ;          ;
; ../src/AID_L2_FIFO.vhd                                                            ; yes             ; User Wizard-Generated File   ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_FIFO.vhd                                 ;          ;
; ../src/AID_L2_ADC_INIT.vhd                                                        ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_ADC_INIT.vhd                             ;          ;
; ../src/AID_L2_AsicSlowControl.vhd                                                 ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_AsicSlowControl.vhd                      ;          ;
; ../src/AID_L2_AsicProbeControl.vhd                                                ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_AsicProbeControl.vhd                     ;          ;
; ../src/AID_L2_FpgaSlowControl.vhd                                                 ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_FpgaSlowControl.vhd                      ;          ;
; ../src/AID_L2_HvOnApply.vhd                                                       ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_HvOnApply.vhd                            ;          ;
; ../src/AID_L2_HvOnSlowControl.vhd                                                 ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L2_HvOnSlowControl.vhd                      ;          ;
; ../src/AID_L3_WRAPPER_ADC.vhd                                                     ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L3_WRAPPER_ADC.vhd                          ;          ;
; ../src/AID_L3_WRAPPER_TSM.vhd                                                     ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L3_WRAPPER_TSM.vhd                          ;          ;
; ../src/AID_L3_AC_WRAPPER.vhd                                                      ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L3_AC_WRAPPER.vhd                           ;          ;
; ../src/AID_L3_SM.vhd                                                              ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L3_SM.vhd                                   ;          ;
; ../src/AID_L3_SM_WRAPPER.vhd                                                      ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_L3_SM_WRAPPER.vhd                           ;          ;
; ../src/AID_AIDA.vhd                                                               ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_AIDA.vhd                                    ;          ;
; ../src/AID_AIDA_L0.vhd                                                            ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_AIDA_L0.vhd                                 ;          ;
; ../src/AID_AIDA_L1.vhd                                                            ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_AIDA_L1.vhd                                 ;          ;
; ../src/AID_AIDA_L2.vhd                                                            ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_AIDA_L2.vhd                                 ;          ;
; ../src/AID_AIDA_L3.vhd                                                            ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_AIDA_L3.vhd                                 ;          ;
; ../src/AID_AIDA_FEB_v2.vhd                                                        ; yes             ; User VHDL File               ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/src/AID_AIDA_FEB_v2.vhd                             ;          ;
; altera_pll.v                                                                      ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altera_pll.v                               ;          ;
; altddio_out.tdf                                                                   ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altddio_out.tdf                            ;          ;
; aglobal140.inc                                                                    ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/aglobal140.inc                             ;          ;
; stratix_ddio.inc                                                                  ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/stratix_ddio.inc                           ;          ;
; cyclone_ddio.inc                                                                  ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/cyclone_ddio.inc                           ;          ;
; lpm_mux.inc                                                                       ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/lpm_mux.inc                                ;          ;
; stratix_lcell.inc                                                                 ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/stratix_lcell.inc                          ;          ;
; db/ddio_out_dri.tdf                                                               ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/ddio_out_dri.tdf                            ;          ;
; dcfifo.tdf                                                                        ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/dcfifo.tdf                                 ;          ;
; lpm_counter.inc                                                                   ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/lpm_counter.inc                            ;          ;
; lpm_add_sub.inc                                                                   ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/lpm_add_sub.inc                            ;          ;
; altdpram.inc                                                                      ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altdpram.inc                               ;          ;
; a_graycounter.inc                                                                 ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_graycounter.inc                          ;          ;
; a_fefifo.inc                                                                      ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_fefifo.inc                               ;          ;
; a_gray2bin.inc                                                                    ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_gray2bin.inc                             ;          ;
; dffpipe.inc                                                                       ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/dffpipe.inc                                ;          ;
; alt_sync_fifo.inc                                                                 ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/alt_sync_fifo.inc                          ;          ;
; lpm_compare.inc                                                                   ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/lpm_compare.inc                            ;          ;
; altsyncram_fifo.inc                                                               ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altsyncram_fifo.inc                        ;          ;
; db/dcfifo_cnm1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dcfifo_cnm1.tdf                             ;          ;
; db/a_gray2bin_g2b.tdf                                                             ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_gray2bin_g2b.tdf                          ;          ;
; db/a_graycounter_d96.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_d96.tdf                       ;          ;
; db/a_graycounter_9nb.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_9nb.tdf                       ;          ;
; db/altsyncram_kv61.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_kv61.tdf                         ;          ;
; db/dffpipe_vu8.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_vu8.tdf                             ;          ;
; db/alt_synch_pipe_6u7.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_6u7.tdf                      ;          ;
; db/dffpipe_0v8.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_0v8.tdf                             ;          ;
; db/alt_synch_pipe_7u7.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_7u7.tdf                      ;          ;
; db/dffpipe_1v8.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_1v8.tdf                             ;          ;
; db/cmpr_1o5.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cmpr_1o5.tdf                                ;          ;
; dcfifo_mixed_widths.tdf                                                           ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/dcfifo_mixed_widths.tdf                    ;          ;
; db/dcfifo_cfq1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dcfifo_cfq1.tdf                             ;          ;
; db/a_graycounter_en6.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_en6.tdf                       ;          ;
; db/a_graycounter_b5c.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_b5c.tdf                       ;          ;
; db/altsyncram_rh91.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_rh91.tdf                         ;          ;
; db/alt_synch_pipe_lc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_lc8.tdf                      ;          ;
; db/dffpipe_fd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_fd9.tdf                             ;          ;
; db/dffpipe_ed9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_ed9.tdf                             ;          ;
; db/alt_synch_pipe_mc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_mc8.tdf                      ;          ;
; db/dffpipe_gd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_gd9.tdf                             ;          ;
; db/cntr_qld.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_qld.tdf                                ;          ;
; db/dcfifo_enp1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dcfifo_enp1.tdf                             ;          ;
; db/a_graycounter_fn6.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_fn6.tdf                       ;          ;
; db/a_graycounter_a5c.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_a5c.tdf                       ;          ;
; db/altsyncram_sh91.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_sh91.tdf                         ;          ;
; db/alt_synch_pipe_nc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_nc8.tdf                      ;          ;
; db/dffpipe_hd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_hd9.tdf                             ;          ;
; db/alt_synch_pipe_oc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_oc8.tdf                      ;          ;
; db/dffpipe_id9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_id9.tdf                             ;          ;
; altsyncram.tdf                                                                    ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altsyncram.tdf                             ;          ;
; stratix_ram_block.inc                                                             ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/stratix_ram_block.inc                      ;          ;
; lpm_decode.inc                                                                    ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/lpm_decode.inc                             ;          ;
; a_rdenreg.inc                                                                     ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_rdenreg.inc                              ;          ;
; altrom.inc                                                                        ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altrom.inc                                 ;          ;
; altram.inc                                                                        ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altram.inc                                 ;          ;
; db/altsyncram_glu3.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_glu3.tdf                         ;          ;
; scfifo.tdf                                                                        ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/scfifo.tdf                                 ;          ;
; a_regfifo.inc                                                                     ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_regfifo.inc                              ;          ;
; a_dpfifo.inc                                                                      ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_dpfifo.inc                               ;          ;
; a_i2fifo.inc                                                                      ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_i2fifo.inc                               ;          ;
; a_fffifo.inc                                                                      ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_fffifo.inc                               ;          ;
; a_f2fifo.inc                                                                      ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/a_f2fifo.inc                               ;          ;
; db/scfifo_57h1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/scfifo_57h1.tdf                             ;          ;
; db/a_dpfifo_dke1.tdf                                                              ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_dpfifo_dke1.tdf                           ;          ;
; db/a_fefifo_t7f.tdf                                                               ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_fefifo_t7f.tdf                            ;          ;
; db/cntr_2a7.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_2a7.tdf                                ;          ;
; db/dpram_tgb1.tdf                                                                 ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dpram_tgb1.tdf                              ;          ;
; db/altsyncram_p0s1.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_p0s1.tdf                         ;          ;
; db/cntr_m9b.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_m9b.tdf                                ;          ;
; db/scfifo_p3h1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/scfifo_p3h1.tdf                             ;          ;
; db/a_dpfifo_1he1.tdf                                                              ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_dpfifo_1he1.tdf                           ;          ;
; db/a_fefifo_h4f.tdf                                                               ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_fefifo_h4f.tdf                            ;          ;
; db/cntr_t97.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_t97.tdf                                ;          ;
; db/dpram_ogb1.tdf                                                                 ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dpram_ogb1.tdf                              ;          ;
; db/altsyncram_f0s1.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_f0s1.tdf                         ;          ;
; db/cntr_h9b.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_h9b.tdf                                ;          ;
; altddio_in.tdf                                                                    ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/altddio_in.tdf                             ;          ;
; db/ddio_in_0ai.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/ddio_in_0ai.tdf                             ;          ;
; db/dcfifo_qfr1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dcfifo_qfr1.tdf                             ;          ;
; db/a_gray2bin_t3b.tdf                                                             ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_gray2bin_t3b.tdf                          ;          ;
; db/a_graycounter_so6.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_so6.tdf                       ;          ;
; db/a_graycounter_o6c.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_o6c.tdf                       ;          ;
; db/altsyncram_2m91.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_2m91.tdf                         ;          ;
; db/dffpipe_re9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_re9.tdf                             ;          ;
; db/alt_synch_pipe_2e8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_2e8.tdf                      ;          ;
; db/dffpipe_se9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_se9.tdf                             ;          ;
; db/alt_synch_pipe_3e8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_3e8.tdf                      ;          ;
; db/dffpipe_te9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_te9.tdf                             ;          ;
; db/cmpr_ep5.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cmpr_ep5.tdf                                ;          ;
; db/dcfifo_mdq1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dcfifo_mdq1.tdf                             ;          ;
; db/a_gray2bin_e2b.tdf                                                             ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_gray2bin_e2b.tdf                          ;          ;
; db/a_graycounter_dn6.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_dn6.tdf                       ;          ;
; db/a_graycounter_95c.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_95c.tdf                       ;          ;
; db/altsyncram_8g91.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_8g91.tdf                         ;          ;
; db/alt_synch_pipe_pc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_pc8.tdf                      ;          ;
; db/dffpipe_ld9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_ld9.tdf                             ;          ;
; db/dffpipe_md9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_md9.tdf                             ;          ;
; db/alt_synch_pipe_qc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_qc8.tdf                      ;          ;
; db/dffpipe_nd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_nd9.tdf                             ;          ;
; db/cmpr_vn5.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cmpr_vn5.tdf                                ;          ;
; lpm_shiftreg.tdf                                                                  ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/lpm_shiftreg.tdf                           ;          ;
; lpm_constant.inc                                                                  ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/lpm_constant.inc                           ;          ;
; dffeea.inc                                                                        ; yes             ; Megafunction                 ; d:/altera/14.0/quartus/libraries/megafunctions/dffeea.inc                                 ;          ;
; db/dcfifo_ohv1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dcfifo_ohv1.tdf                             ;          ;
; db/a_gray2bin_d2b.tdf                                                             ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_gray2bin_d2b.tdf                          ;          ;
; db/a_graycounter_cn6.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_cn6.tdf                       ;          ;
; db/a_graycounter_85c.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_85c.tdf                       ;          ;
; db/dpram_tm91.tdf                                                                 ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dpram_tm91.tdf                              ;          ;
; db/dffpipe_bd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_bd9.tdf                             ;          ;
; db/alt_synch_pipe_ic8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_ic8.tdf                      ;          ;
; db/dffpipe_cd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_cd9.tdf                             ;          ;
; db/alt_synch_pipe_jc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_jc8.tdf                      ;          ;
; db/dffpipe_dd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_dd9.tdf                             ;          ;
; db/cmpr_un5.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cmpr_un5.tdf                                ;          ;
; db/dcfifo_abv1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dcfifo_abv1.tdf                             ;          ;
; db/a_gray2bin_c2b.tdf                                                             ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_gray2bin_c2b.tdf                          ;          ;
; db/a_graycounter_bn6.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_bn6.tdf                       ;          ;
; db/a_graycounter_75c.tdf                                                          ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_graycounter_75c.tdf                       ;          ;
; db/dpram_mm91.tdf                                                                 ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dpram_mm91.tdf                              ;          ;
; db/dffpipe_ad9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_ad9.tdf                             ;          ;
; db/alt_synch_pipe_hc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_hc8.tdf                      ;          ;
; db/dffpipe_jd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_jd9.tdf                             ;          ;
; db/alt_synch_pipe_kc8.tdf                                                         ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/alt_synch_pipe_kc8.tdf                      ;          ;
; db/dffpipe_kd9.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dffpipe_kd9.tdf                             ;          ;
; db/cmpr_tn5.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cmpr_tn5.tdf                                ;          ;
; db/scfifo_q3h1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/scfifo_q3h1.tdf                             ;          ;
; db/a_dpfifo_2he1.tdf                                                              ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_dpfifo_2he1.tdf                           ;          ;
; db/a_fefifo_m4f.tdf                                                               ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_fefifo_m4f.tdf                            ;          ;
; db/cntr_u97.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_u97.tdf                                ;          ;
; db/dpram_kgb1.tdf                                                                 ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dpram_kgb1.tdf                              ;          ;
; db/altsyncram_70s1.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_70s1.tdf                         ;          ;
; db/cntr_i9b.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_i9b.tdf                                ;          ;
; db/scfifo_37h1.tdf                                                                ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/scfifo_37h1.tdf                             ;          ;
; db/a_dpfifo_bke1.tdf                                                              ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_dpfifo_bke1.tdf                           ;          ;
; db/a_fefifo_08f.tdf                                                               ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/a_fefifo_08f.tdf                            ;          ;
; db/cntr_3a7.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_3a7.tdf                                ;          ;
; db/dpram_pgb1.tdf                                                                 ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/dpram_pgb1.tdf                              ;          ;
; db/altsyncram_h0s1.tdf                                                            ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/altsyncram_h0s1.tdf                         ;          ;
; db/cntr_n9b.tdf                                                                   ; yes             ; Auto-Generated Megafunction  ; J:/vhdl_db/trunk/projets/AID_AIDA_FEB/A5C4/db/cntr_n9b.tdf                                ;          ;
+-----------------------------------------------------------------------------------+-----------------+------------------------------+-------------------------------------------------------------------------------------------+----------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis IP Cores Summary                                                                                                                                                                                                                                           ;
+--------+--------------+---------+--------------+--------------+---------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------+
; Vendor ; IP Core Name ; Version ; Release Date ; License Type ; Entity Instance                                                                                                                       ; IP Include File                                                         ;
+--------+--------------+---------+--------------+--------------+---------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------+
; Altera ; ALTDDIO_OUT  ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK                                   ; ../../../lib/usb_usb/c_aria5/src/USB_UC_PCLK.vhd                        ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX                      ; ../src/AID_L1_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX                      ; ../src/AID_L1_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX                      ; ../src/AID_L1_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX                      ; ../src/AID_L1_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX                      ; ../src/AID_L1_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX                      ; ../src/AID_L1_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX         ; ../src/AID_L1_FIFO_OTHER.vhd                                            ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX         ; ../src/AID_L1_FIFO_OTHER.vhd                                            ;
; Altera ; RAM: 2-PORT  ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L2_DPRAM:C_DPRAM                                                                                                    ; ../src/AID_L2_DPRAM.vhd                                                 ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX        ; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO8_D4.vhd  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX        ; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO8_D4.vhd  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX                                       ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX                                      ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX                                      ; ../src/AID_L1_HIT_FIFO.vhd                                              ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX                  ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX                 ; ../src/AID_L0_FIFO.vhd                                                  ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:1:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:2:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:3:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:4:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:5:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:6:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:7:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:8:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:9:C_TRIG_DELAY_SRX  ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:10:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:11:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:12:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:13:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:14:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:15:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:16:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:17:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:18:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:19:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:20:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:21:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:22:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:23:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:24:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:25:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:26:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:27:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:28:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:29:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:30:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:31:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:32:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:33:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:34:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:35:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:36:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:37:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:38:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:39:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:40:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:41:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:42:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:43:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:44:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:45:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:46:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:47:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:48:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:49:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:50:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:51:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:52:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:53:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:54:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:55:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:56:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:57:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:58:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:59:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:60:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:61:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:62:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:63:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:64:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:65:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:66:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:67:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:68:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:69:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:70:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:71:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:72:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:73:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:74:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:75:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:76:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:77:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:78:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:79:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:80:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:81:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:82:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:83:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:84:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:85:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:86:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:87:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:88:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:89:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:90:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:91:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:92:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:93:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:94:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; LPM_SHIFTREG ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:95:C_TRIG_DELAY_SRX ; ../src/AID_L0_TRIG_DELAY.vhd                                            ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD                       ; ../src/AID_L0_FIFO_PERIOD.vhd                                           ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a                                                               ; ../src/AID_L2i_FIFO.vhd                                                 ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h                                                               ; ../src/AID_L2i_FIFO.vhd                                                 ;
; Altera ; altera_pll   ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|AID_pll3:C_PLL100M                                                                                                      ; ../src/AID_pll3.vhd                                                     ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX                                                     ; ../../../lib/usb_usb/c_aria5/src/USB_L2_TX_FIFO.vhd                     ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX      ; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_RX32.vhd ;
; Altera ; FIFO         ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX      ; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_TX32.vhd ;
; Altera ; ALTDDIO_OUT  ; 14.0    ; N/A          ; N/A          ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK                                           ; ../../../lib/usb_usb/c_aria5/src/USB_UC_PCLK.vhd                        ;
+--------+--------------+---------+--------------+--------------+---------------------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------+


+------------------------------------------------------------------------------+
; Partition Status Summary                                                     ;
+-----------------------------------+-------------+----------------------------+
; Partition Name                    ; Synthesized ; Reason                     ;
+-----------------------------------+-------------+----------------------------+
; Top                               ; yes         ; netlist type = Source File ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER ; no          ; No relevant changes        ;
+-----------------------------------+-------------+----------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Partition for Top-Level Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                                                                                       ;
+--------------------------------------------------------------------+-------------------+--------------+-------------------+------------+------+--------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                         ; LC Combinationals ; LC Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                                                                                                                                                            ; Library Name ;
+--------------------------------------------------------------------+-------------------+--------------+-------------------+------------+------+--------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |AID_AIDA_FEB                                                      ; 3264 (121)        ; 5320 (269)   ; 187936            ; 0          ; 0    ; 0            ; |AID_AIDA_FEB                                                                                                                                                                                                                                                  ; work         ;
;    |AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL|                    ; 34 (34)           ; 20 (20)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL                                                                                                                                                                                                       ; work         ;
;    |AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|                      ; 82 (82)           ; 55 (55)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL                                                                                                                                                                                                         ; work         ;
;    |AID_L2_DPRAM:C_DPRAM|                                          ; 0 (0)             ; 0 (0)        ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_DPRAM:C_DPRAM                                                                                                                                                                                                                             ; work         ;
;       |altsyncram:altsyncram_component|                            ; 0 (0)             ; 0 (0)        ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component                                                                                                                                                                                             ; work         ;
;          |altsyncram_glu3:auto_generated|                          ; 0 (0)             ; 0 (0)        ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component|altsyncram_glu3:auto_generated                                                                                                                                                              ; work         ;
;    |AID_L2_FIFO:C_FIFO_L2|                                         ; 99 (0)            ; 149 (0)      ; 135168            ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2                                                                                                                                                                                                                            ; work         ;
;       |dcfifo:dcfifo_component|                                    ; 99 (0)            ; 149 (0)      ; 135168            ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component                                                                                                                                                                                                    ; work         ;
;          |dcfifo_qfr1:auto_generated|                              ; 99 (16)           ; 149 (39)     ; 135168            ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated                                                                                                                                                                         ; work         ;
;             |a_gray2bin_t3b:wrptr_g_gray2bin|                      ; 12 (12)           ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_gray2bin_t3b:wrptr_g_gray2bin                                                                                                                                         ; work         ;
;             |a_gray2bin_t3b:ws_dgrp_gray2bin|                      ; 12 (12)           ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_gray2bin_t3b:ws_dgrp_gray2bin                                                                                                                                         ; work         ;
;             |a_graycounter_o6c:wrptr_g1p|                          ; 20 (20)           ; 17 (17)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_o6c:wrptr_g1p                                                                                                                                             ; work         ;
;             |a_graycounter_so6:rdptr_g1p|                          ; 28 (28)           ; 17 (17)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_so6:rdptr_g1p                                                                                                                                             ; work         ;
;             |alt_synch_pipe_2e8:rs_dgwp|                           ; 0 (0)             ; 26 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp                                                                                                                                              ; work         ;
;                |dffpipe_se9:dffpipe13|                             ; 0 (0)             ; 26 (26)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp|dffpipe_se9:dffpipe13                                                                                                                        ; work         ;
;             |alt_synch_pipe_3e8:ws_dgrp|                           ; 0 (0)             ; 26 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp                                                                                                                                              ; work         ;
;                |dffpipe_te9:dffpipe16|                             ; 0 (0)             ; 26 (26)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp|dffpipe_te9:dffpipe16                                                                                                                        ; work         ;
;             |altsyncram_2m91:fifo_ram|                             ; 0 (0)             ; 0 (0)        ; 135168            ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|altsyncram_2m91:fifo_ram                                                                                                                                                ; work         ;
;             |cmpr_ep5:rdempty_eq_comp|                             ; 5 (5)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|cmpr_ep5:rdempty_eq_comp                                                                                                                                                ; work         ;
;             |cmpr_ep5:wrfull_eq_comp|                              ; 6 (6)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|cmpr_ep5:wrfull_eq_comp                                                                                                                                                 ; work         ;
;             |dffpipe_re9:ws_brp|                                   ; 0 (0)             ; 12 (12)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_brp                                                                                                                                                      ; work         ;
;             |dffpipe_re9:ws_bwp|                                   ; 0 (0)             ; 12 (12)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_bwp                                                                                                                                                      ; work         ;
;    |AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|                      ; 26 (26)           ; 624 (624)    ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL                                                                                                                                                                                                         ; work         ;
;    |AID_L2_HVONSLOWCONTROL:C_HVON|                                 ; 358 (1)           ; 395 (0)      ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON                                                                                                                                                                                                                    ; work         ;
;       |AID_L2_HVONAPPLY:C_HVON_APPLY|                              ; 173 (172)         ; 91 (89)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY                                                                                                                                                                                      ; work         ;
;          |U_OnePulse:C_BDRATE_PULSE|                               ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|U_OnePulse:C_BDRATE_PULSE                                                                                                                                                            ; work         ;
;       |UFP_USER_GET_CONFIG:C_HVON_USER_GET|                        ; 55 (55)           ; 28 (28)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET                                                                                                                                                                                ; work         ;
;       |UFP_USER_SET_CONFIG:C_HVON_USER_SET|                        ; 19 (19)           ; 116 (116)    ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET                                                                                                                                                                                ; work         ;
;       |ser_uart_wrapper:C_UART|                                    ; 110 (0)           ; 160 (0)      ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART                                                                                                                                                                                            ; work         ;
;          |ser_uart_wrapper8_d4:\g8_d4:u1|                          ; 110 (0)           ; 160 (0)      ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1                                                                                                                                                             ; work         ;
;             |SER_UART_FIFO8_D4:C_FIFO_RX|                          ; 21 (0)            ; 47 (0)       ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX                                                                                                                                 ; work         ;
;                |dcfifo:dcfifo_component|                           ; 21 (0)            ; 47 (0)       ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component                                                                                                         ; work         ;
;                   |dcfifo_mdq1:auto_generated|                     ; 21 (3)            ; 47 (15)      ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated                                                                              ; work         ;
;                      |a_graycounter_95c:wrptr_g1p|                 ; 6 (6)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_95c:wrptr_g1p                                                  ; work         ;
;                      |a_graycounter_dn6:rdptr_g1p|                 ; 8 (8)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_dn6:rdptr_g1p                                                  ; work         ;
;                      |alt_synch_pipe_pc8:rs_dgwp|                  ; 0 (0)             ; 10 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp                                                   ; work         ;
;                         |dffpipe_ld9:dffpipe10|                    ; 0 (0)             ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp|dffpipe_ld9:dffpipe10                             ; work         ;
;                      |alt_synch_pipe_qc8:ws_dgrp|                  ; 0 (0)             ; 10 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp                                                   ; work         ;
;                         |dffpipe_nd9:dffpipe14|                    ; 0 (0)             ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp|dffpipe_nd9:dffpipe14                             ; work         ;
;                      |altsyncram_8g91:fifo_ram|                    ; 0 (0)             ; 0 (0)        ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|altsyncram_8g91:fifo_ram                                                     ; work         ;
;                      |cmpr_vn5:rdempty_eq_comp|                    ; 2 (2)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|cmpr_vn5:rdempty_eq_comp                                                     ; work         ;
;                      |cmpr_vn5:wrfull_eq_comp|                     ; 2 (2)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|cmpr_vn5:wrfull_eq_comp                                                      ; work         ;
;             |SER_UART_FIFO8_D4:C_FIFO_TX|                          ; 26 (0)            ; 47 (0)       ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX                                                                                                                                 ; work         ;
;                |dcfifo:dcfifo_component|                           ; 26 (0)            ; 47 (0)       ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component                                                                                                         ; work         ;
;                   |dcfifo_mdq1:auto_generated|                     ; 26 (7)            ; 47 (15)      ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated                                                                              ; work         ;
;                      |a_graycounter_95c:wrptr_g1p|                 ; 6 (6)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_95c:wrptr_g1p                                                  ; work         ;
;                      |a_graycounter_dn6:rdptr_g1p|                 ; 7 (7)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_dn6:rdptr_g1p                                                  ; work         ;
;                      |alt_synch_pipe_pc8:rs_dgwp|                  ; 0 (0)             ; 10 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp                                                   ; work         ;
;                         |dffpipe_ld9:dffpipe10|                    ; 0 (0)             ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp|dffpipe_ld9:dffpipe10                             ; work         ;
;                      |alt_synch_pipe_qc8:ws_dgrp|                  ; 0 (0)             ; 10 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp                                                   ; work         ;
;                         |dffpipe_nd9:dffpipe14|                    ; 0 (0)             ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp|dffpipe_nd9:dffpipe14                             ; work         ;
;                      |altsyncram_8g91:fifo_ram|                    ; 0 (0)             ; 0 (0)        ; 128               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|altsyncram_8g91:fifo_ram                                                     ; work         ;
;                      |cmpr_vn5:rdempty_eq_comp|                    ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|cmpr_vn5:rdempty_eq_comp                                                     ; work         ;
;                      |cmpr_vn5:wrfull_eq_comp|                     ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|cmpr_vn5:wrfull_eq_comp                                                      ; work         ;
;             |ser_uart:C_UART|                                      ; 63 (2)            ; 66 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART                                                                                                                                             ; work         ;
;                |ser_uart_bdgen:C_BDGEN|                            ; 15 (15)           ; 14 (14)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN                                                                                                                      ; work         ;
;                |ser_uart_deser:C_DESER|                            ; 21 (18)           ; 31 (28)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER                                                                                                                      ; work         ;
;                   |ser_data_5_bits_filter:C_FILTER_SIN|            ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|ser_data_5_bits_filter:C_FILTER_SIN                                                                                  ; work         ;
;                |ser_uart_ser:C_SER|                                ; 25 (25)           ; 21 (21)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER                                                                                                                          ; work         ;
;    |AID_L3_AC_WRAPPER:C_AC_WRAPPER|                                ; 1446 (2)          ; 2892 (0)     ; 21728             ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER                                                                                                                                                                                                                   ; work         ;
;       |AID_L1_SM:C_L1_SM|                                          ; 124 (90)          ; 45 (37)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM                                                                                                                                                                                                 ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER                                                                                                                                                                 ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                          ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER                                                                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                  ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                                                                                          ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                  ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                                                                                          ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                  ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                                                                                          ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                  ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                                                                                          ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                  ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                                                                                          ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                  ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                                                                                          ; work         ;
;       |AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|                           ; 701 (5)           ; 2031 (0)     ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC                                                                                                                                                                                  ; work         ;
;          |AID_L1_ADC_DDR:C_ADC_DDR|                                ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR                                                                                                                                                         ; work         ;
;             |altddio_in:ALTDDIO_IN_component|                      ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component                                                                                                                         ; work         ;
;                |ddio_in_0ai:auto_generated|                        ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component|ddio_in_0ai:auto_generated                                                                                              ; work         ;
;          |AID_L1_ADC_Driver:C_ADC_Driver|                          ; 12 (12)           ; 122 (122)    ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver                                                                                                                                                   ; work         ;
;          |AID_L1_ADC_SM:C_ADC_SM|                                  ; 527 (527)         ; 1792 (1792)  ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM                                                                                                                                                           ; work         ;
;          |AID_L1_Hold_Manager:C_HOLD_MANAGER|                      ; 66 (66)           ; 40 (40)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER                                                                                                                                               ; work         ;
;          |AID_L2_ADC_INIT:C_ADC_Init|                              ; 91 (91)           ; 77 (77)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init                                                                                                                                                       ; work         ;
;          |USB_UC_PCLK:C_ADC_CLK|                                   ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK                                                                                                                                                            ; work         ;
;             |altddio_out:ALTDDIO_OUT_component|                    ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component                                                                                                                          ; work         ;
;                |ddio_out_dri:auto_generated|                       ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component|ddio_out_dri:auto_generated                                                                                              ; work         ;
;       |AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|                           ; 619 (14)          ; 816 (5)      ; 21728             ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM                                                                                                                                                                                  ; work         ;
;          |AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|                      ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX                                                                                                                                               ; work         ;
;             |scfifo:scfifo_component|                              ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component                                                                                                                       ; work         ;
;                |scfifo_57h1:auto_generated|                        ; 30 (2)            ; 24 (1)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated                                                                                            ; work         ;
;                   |a_dpfifo_dke1:dpfifo|                           ; 28 (0)            ; 23 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo                                                                       ; work         ;
;                      |a_fefifo_t7f:fifo_state|                     ; 14 (7)            ; 9 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state                                               ; work         ;
;                         |cntr_2a7:count_usedw|                     ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state|cntr_2a7:count_usedw                          ; work         ;
;                      |cntr_m9b:rd_ptr_count|                       ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:rd_ptr_count                                                 ; work         ;
;                      |cntr_m9b:wr_ptr|                             ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:wr_ptr                                                       ; work         ;
;                      |dpram_tgb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram                                                    ; work         ;
;                         |altsyncram_p0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1                        ; work         ;
;          |AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|                      ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX                                                                                                                                               ; work         ;
;             |scfifo:scfifo_component|                              ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component                                                                                                                       ; work         ;
;                |scfifo_57h1:auto_generated|                        ; 30 (2)            ; 24 (1)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated                                                                                            ; work         ;
;                   |a_dpfifo_dke1:dpfifo|                           ; 28 (0)            ; 23 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo                                                                       ; work         ;
;                      |a_fefifo_t7f:fifo_state|                     ; 14 (7)            ; 9 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state                                               ; work         ;
;                         |cntr_2a7:count_usedw|                     ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state|cntr_2a7:count_usedw                          ; work         ;
;                      |cntr_m9b:rd_ptr_count|                       ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:rd_ptr_count                                                 ; work         ;
;                      |cntr_m9b:wr_ptr|                             ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:wr_ptr                                                       ; work         ;
;                      |dpram_tgb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram                                                    ; work         ;
;                         |altsyncram_p0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1                        ; work         ;
;          |AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|                      ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX                                                                                                                                               ; work         ;
;             |scfifo:scfifo_component|                              ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component                                                                                                                       ; work         ;
;                |scfifo_57h1:auto_generated|                        ; 30 (2)            ; 24 (1)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated                                                                                            ; work         ;
;                   |a_dpfifo_dke1:dpfifo|                           ; 28 (1)            ; 23 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo                                                                       ; work         ;
;                      |a_fefifo_t7f:fifo_state|                     ; 13 (6)            ; 9 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state                                               ; work         ;
;                         |cntr_2a7:count_usedw|                     ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state|cntr_2a7:count_usedw                          ; work         ;
;                      |cntr_m9b:rd_ptr_count|                       ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:rd_ptr_count                                                 ; work         ;
;                      |cntr_m9b:wr_ptr|                             ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:wr_ptr                                                       ; work         ;
;                      |dpram_tgb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram                                                    ; work         ;
;                         |altsyncram_p0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1                        ; work         ;
;          |AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|                      ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX                                                                                                                                               ; work         ;
;             |scfifo:scfifo_component|                              ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component                                                                                                                       ; work         ;
;                |scfifo_57h1:auto_generated|                        ; 30 (2)            ; 24 (1)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated                                                                                            ; work         ;
;                   |a_dpfifo_dke1:dpfifo|                           ; 28 (0)            ; 23 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo                                                                       ; work         ;
;                      |a_fefifo_t7f:fifo_state|                     ; 14 (7)            ; 9 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state                                               ; work         ;
;                         |cntr_2a7:count_usedw|                     ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state|cntr_2a7:count_usedw                          ; work         ;
;                      |cntr_m9b:rd_ptr_count|                       ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:rd_ptr_count                                                 ; work         ;
;                      |cntr_m9b:wr_ptr|                             ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:wr_ptr                                                       ; work         ;
;                      |dpram_tgb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram                                                    ; work         ;
;                         |altsyncram_p0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1                        ; work         ;
;          |AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|                      ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX                                                                                                                                               ; work         ;
;             |scfifo:scfifo_component|                              ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component                                                                                                                       ; work         ;
;                |scfifo_57h1:auto_generated|                        ; 30 (2)            ; 24 (1)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated                                                                                            ; work         ;
;                   |a_dpfifo_dke1:dpfifo|                           ; 28 (1)            ; 23 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo                                                                       ; work         ;
;                      |a_fefifo_t7f:fifo_state|                     ; 13 (6)            ; 9 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state                                               ; work         ;
;                         |cntr_2a7:count_usedw|                     ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state|cntr_2a7:count_usedw                          ; work         ;
;                      |cntr_m9b:rd_ptr_count|                       ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:rd_ptr_count                                                 ; work         ;
;                      |cntr_m9b:wr_ptr|                             ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:wr_ptr                                                       ; work         ;
;                      |dpram_tgb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram                                                    ; work         ;
;                         |altsyncram_p0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1                        ; work         ;
;          |AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|                      ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX                                                                                                                                               ; work         ;
;             |scfifo:scfifo_component|                              ; 30 (0)            ; 24 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component                                                                                                                       ; work         ;
;                |scfifo_57h1:auto_generated|                        ; 30 (2)            ; 24 (1)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated                                                                                            ; work         ;
;                   |a_dpfifo_dke1:dpfifo|                           ; 28 (1)            ; 23 (0)       ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo                                                                       ; work         ;
;                      |a_fefifo_t7f:fifo_state|                     ; 13 (6)            ; 9 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state                                               ; work         ;
;                         |cntr_2a7:count_usedw|                     ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state|cntr_2a7:count_usedw                          ; work         ;
;                      |cntr_m9b:rd_ptr_count|                       ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:rd_ptr_count                                                 ; work         ;
;                      |cntr_m9b:wr_ptr|                             ; 7 (7)             ; 7 (7)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:wr_ptr                                                       ; work         ;
;                      |dpram_tgb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram                                                    ; work         ;
;                         |altsyncram_p0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 3584              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1                        ; work         ;
;          |AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|         ; 11 (0)            ; 9 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX                                                                                                                                  ; work         ;
;             |scfifo:scfifo_component|                              ; 11 (0)            ; 9 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component                                                                                                          ; work         ;
;                |scfifo_p3h1:auto_generated|                        ; 11 (1)            ; 9 (1)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated                                                                               ; work         ;
;                   |a_dpfifo_1he1:dpfifo|                           ; 10 (0)            ; 8 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo                                                          ; work         ;
;                      |a_fefifo_h4f:fifo_state|                     ; 6 (4)             ; 4 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|a_fefifo_h4f:fifo_state                                  ; work         ;
;                         |cntr_t97:count_usedw|                     ; 2 (2)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|a_fefifo_h4f:fifo_state|cntr_t97:count_usedw             ; work         ;
;                      |cntr_h9b:rd_ptr_count|                       ; 2 (2)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|cntr_h9b:rd_ptr_count                                    ; work         ;
;                      |cntr_h9b:wr_ptr|                             ; 2 (2)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|cntr_h9b:wr_ptr                                          ; work         ;
;                      |dpram_ogb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram                                       ; work         ;
;                         |altsyncram_f0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram|altsyncram_f0s1:altsyncram1           ; work         ;
;          |AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|         ; 11 (0)            ; 9 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX                                                                                                                                  ; work         ;
;             |scfifo:scfifo_component|                              ; 11 (0)            ; 9 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component                                                                                                          ; work         ;
;                |scfifo_p3h1:auto_generated|                        ; 11 (1)            ; 9 (1)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated                                                                               ; work         ;
;                   |a_dpfifo_1he1:dpfifo|                           ; 10 (1)            ; 8 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo                                                          ; work         ;
;                      |a_fefifo_h4f:fifo_state|                     ; 5 (3)             ; 4 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|a_fefifo_h4f:fifo_state                                  ; work         ;
;                         |cntr_t97:count_usedw|                     ; 2 (2)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|a_fefifo_h4f:fifo_state|cntr_t97:count_usedw             ; work         ;
;                      |cntr_h9b:rd_ptr_count|                       ; 2 (2)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|cntr_h9b:rd_ptr_count                                    ; work         ;
;                      |cntr_h9b:wr_ptr|                             ; 2 (2)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|cntr_h9b:wr_ptr                                          ; work         ;
;                      |dpram_ogb1:FIFOram|                          ; 0 (0)             ; 0 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram                                       ; work         ;
;                         |altsyncram_f0s1:altsyncram1|              ; 0 (0)             ; 0 (0)        ; 112               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram|altsyncram_f0s1:altsyncram1           ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX|   ; 95 (95)           ; 97 (97)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|   ; 94 (94)           ; 98 (98)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX|   ; 93 (93)           ; 98 (98)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX|   ; 38 (38)           ; 96 (96)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX|   ; 38 (38)           ; 97 (97)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|   ; 41 (41)           ; 97 (97)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|   ; 2 (2)             ; 34 (34)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;          |AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|   ; 2 (2)             ; 32 (32)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX                                                                                                                            ; work         ;
;    |AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|                             ; 457 (0)           ; 325 (0)      ; 16384             ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER                                                                                                                                                                                                                ; work         ;
;       |AID_L1_Counters:C_L1Counters|                               ; 191 (190)         ; 211 (209)    ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters                                                                                                                                                                                   ; work         ;
;          |U_OnePulse:C_pulseSpill|                                 ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters|U_OnePulse:C_pulseSpill                                                                                                                                                           ; work         ;
;       |AID_L2i_FIFO:C_FIFO_L2a|                                    ; 40 (0)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a                                                                                                                                                                                        ; work         ;
;          |scfifo:scfifo_component|                                 ; 40 (0)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component                                                                                                                                                                ; work         ;
;             |scfifo_37h1:auto_generated|                           ; 40 (0)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated                                                                                                                                     ; work         ;
;                |a_dpfifo_bke1:dpfifo|                              ; 40 (3)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo                                                                                                                ; work         ;
;                   |a_fefifo_08f:fifo_state|                        ; 21 (13)           ; 10 (2)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|a_fefifo_08f:fifo_state                                                                                        ; work         ;
;                      |cntr_3a7:count_usedw|                        ; 8 (8)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|a_fefifo_08f:fifo_state|cntr_3a7:count_usedw                                                                   ; work         ;
;                   |cntr_n9b:rd_ptr_count|                          ; 8 (8)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|cntr_n9b:rd_ptr_count                                                                                          ; work         ;
;                   |cntr_n9b:wr_ptr|                                ; 8 (8)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|cntr_n9b:wr_ptr                                                                                                ; work         ;
;                   |dpram_pgb1:FIFOram|                             ; 0 (0)             ; 0 (0)        ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram                                                                                             ; work         ;
;                      |altsyncram_h0s1:altsyncram1|                 ; 0 (0)             ; 0 (0)        ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram|altsyncram_h0s1:altsyncram1                                                                 ; work         ;
;       |AID_L2i_FIFO:C_FIFO_L2h|                                    ; 34 (0)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h                                                                                                                                                                                        ; work         ;
;          |scfifo:scfifo_component|                                 ; 34 (0)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component                                                                                                                                                                ; work         ;
;             |scfifo_37h1:auto_generated|                           ; 34 (0)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated                                                                                                                                     ; work         ;
;                |a_dpfifo_bke1:dpfifo|                              ; 34 (0)            ; 26 (0)       ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo                                                                                                                ; work         ;
;                   |a_fefifo_08f:fifo_state|                        ; 18 (10)           ; 10 (2)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|a_fefifo_08f:fifo_state                                                                                        ; work         ;
;                      |cntr_3a7:count_usedw|                        ; 8 (8)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|a_fefifo_08f:fifo_state|cntr_3a7:count_usedw                                                                   ; work         ;
;                   |cntr_n9b:rd_ptr_count|                          ; 8 (8)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|cntr_n9b:rd_ptr_count                                                                                          ; work         ;
;                   |cntr_n9b:wr_ptr|                                ; 8 (8)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|cntr_n9b:wr_ptr                                                                                                ; work         ;
;                   |dpram_pgb1:FIFOram|                             ; 0 (0)             ; 0 (0)        ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram                                                                                             ; work         ;
;                      |altsyncram_h0s1:altsyncram1|                 ; 0 (0)             ; 0 (0)        ; 8192              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram|altsyncram_h0s1:altsyncram1                                                                 ; work         ;
;       |AID_L3_SM:C_L3_SM|                                          ; 192 (192)         ; 62 (62)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM                                                                                                                                                                                              ; work         ;
;    |AID_pll3:C_PLL100M|                                            ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_pll3:C_PLL100M                                                                                                                                                                                                                               ; aid_pll3     ;
;       |AID_pll3_0002:aid_pll3_inst|                                ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst                                                                                                                                                                                                   ; AID_pll3     ;
;          |altera_pll:altera_pll_i|                                 ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst|altera_pll:altera_pll_i                                                                                                                                                                           ; work         ;
;    |UFP_WRAPPER_USB_UART:C_WRAPPER_USB|                            ; 640 (5)           ; 589 (1)      ; 6208              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB                                                                                                                                                                                                               ; work         ;
;       |UFP_DECODER:C_DECODER|                                      ; 198 (198)         ; 81 (81)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER                                                                                                                                                                                         ; work         ;
;       |UFP_ENCODER_UART:C_ENCODER|                                 ; 116 (116)         ; 111 (111)    ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER                                                                                                                                                                                    ; work         ;
;       |USB_L2_TX_FIFO:C_FIFO_READOUT_TX|                           ; 69 (0)            ; 93 (0)       ; 2112              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX                                                                                                                                                                              ; work         ;
;          |dcfifo:dcfifo_component|                                 ; 69 (0)            ; 93 (0)       ; 2112              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component                                                                                                                                                      ; work         ;
;             |dcfifo_cnm1:auto_generated|                           ; 69 (18)           ; 93 (21)      ; 2112              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated                                                                                                                           ; work         ;
;                |a_gray2bin_g2b:rdptr_g_gray2bin|                   ; 6 (6)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_gray2bin_g2b:rdptr_g_gray2bin                                                                                           ; work         ;
;                |a_gray2bin_g2b:rs_dgwp_gray2bin|                   ; 6 (6)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_gray2bin_g2b:rs_dgwp_gray2bin                                                                                           ; work         ;
;                |a_gray2bin_g2b:wrptr_g_gray2bin|                   ; 5 (5)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_gray2bin_g2b:wrptr_g_gray2bin                                                                                           ; work         ;
;                |a_gray2bin_g2b:ws_dgrp_gray2bin|                   ; 6 (6)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_gray2bin_g2b:ws_dgrp_gray2bin                                                                                           ; work         ;
;                |a_graycounter_9nb:wrptr_g1p|                       ; 10 (10)           ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_9nb:wrptr_g1p                                                                                               ; work         ;
;                |a_graycounter_d96:rdptr_g1p|                       ; 11 (11)           ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_d96:rdptr_g1p                                                                                               ; work         ;
;                |alt_synch_pipe_6u7:rs_dgwp|                        ; 0 (0)             ; 14 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp                                                                                                ; work         ;
;                   |dffpipe_0v8:dffpipe13|                          ; 0 (0)             ; 14 (14)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp|dffpipe_0v8:dffpipe13                                                                          ; work         ;
;                |alt_synch_pipe_7u7:ws_dgrp|                        ; 0 (0)             ; 14 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp                                                                                                ; work         ;
;                   |dffpipe_1v8:dffpipe16|                          ; 0 (0)             ; 14 (14)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp|dffpipe_1v8:dffpipe16                                                                          ; work         ;
;                |altsyncram_kv61:fifo_ram|                          ; 0 (0)             ; 0 (0)        ; 2112              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|altsyncram_kv61:fifo_ram                                                                                                  ; work         ;
;                |cmpr_1o5:rdempty_eq_comp|                          ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|cmpr_1o5:rdempty_eq_comp                                                                                                  ; work         ;
;                |cmpr_1o5:wrfull_eq_comp|                           ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|cmpr_1o5:wrfull_eq_comp                                                                                                   ; work         ;
;                |dffpipe_vu8:rs_brp|                                ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_brp                                                                                                        ; work         ;
;                |dffpipe_vu8:rs_bwp|                                ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_bwp                                                                                                        ; work         ;
;                |dffpipe_vu8:ws_brp|                                ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_brp                                                                                                        ; work         ;
;                |dffpipe_vu8:ws_bwp|                                ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_bwp                                                                                                        ; work         ;
;       |USB_USB_Reader:C_USB|                                       ; 65 (65)           ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB                                                                                                                                                                                          ; work         ;
;          |USB_UC_PCLK:C_UC_PCLK|                                   ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK                                                                                                                                                                    ; work         ;
;             |altddio_out:ALTDDIO_OUT_component|                    ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component                                                                                                                                  ; work         ;
;                |ddio_out_dri:auto_generated|                       ; 0 (0)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component|ddio_out_dri:auto_generated                                                                                                      ; work         ;
;       |ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|                         ; 34 (4)            ; 21 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC                                                                                                                                                                            ; work         ;
;          |ser_crc:C_CRC|                                           ; 30 (30)           ; 21 (21)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC                                                                                                                                                              ; work         ;
;       |ser_uart_wrapper:C_UART|                                    ; 153 (0)           ; 218 (0)      ; 4096              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART                                                                                                                                                                                       ; work         ;
;          |ser_uart_wrapper32:\g32:u1|                              ; 153 (0)           ; 218 (0)      ; 4096              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1                                                                                                                                                            ; work         ;
;             |SER_UART_FIFO_RX32:C_FIFO_RX|                         ; 40 (0)            ; 73 (0)       ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX                                                                                                                               ; work         ;
;                |dcfifo_mixed_widths:dcfifo_mixed_widths_component| ; 40 (0)            ; 73 (0)       ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component                                                                             ; work         ;
;                   |dcfifo_enp1:auto_generated|                     ; 40 (6)            ; 73 (23)      ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated                                                  ; work         ;
;                      |a_graycounter_a5c:wrptr_g1p|                 ; 11 (11)           ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_a5c:wrptr_g1p                      ; work         ;
;                      |a_graycounter_fn6:rdptr_g1p|                 ; 11 (11)           ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_fn6:rdptr_g1p                      ; work         ;
;                      |alt_synch_pipe_nc8:rs_dgwp|                  ; 0 (0)             ; 14 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp                       ; work         ;
;                         |dffpipe_hd9:dffpipe12|                    ; 0 (0)             ; 14 (14)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp|dffpipe_hd9:dffpipe12 ; work         ;
;                      |alt_synch_pipe_oc8:ws_dgrp|                  ; 0 (0)             ; 14 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp                       ; work         ;
;                         |dffpipe_id9:dffpipe15|                    ; 0 (0)             ; 14 (14)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp|dffpipe_id9:dffpipe15 ; work         ;
;                      |altsyncram_sh91:fifo_ram|                    ; 0 (0)             ; 0 (0)        ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|altsyncram_sh91:fifo_ram                         ; work         ;
;                      |cmpr_1o5:rdempty_eq_comp|                    ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|cmpr_1o5:rdempty_eq_comp                         ; work         ;
;                      |cmpr_1o5:wrfull_eq_comp|                     ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|cmpr_1o5:wrfull_eq_comp                          ; work         ;
;                      |cntr_qld:cntr_b|                             ; 4 (4)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|cntr_qld:cntr_b                                  ; work         ;
;             |SER_UART_FIFO_TX32:C_FIFO_TX|                         ; 56 (0)            ; 83 (0)       ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX                                                                                                                               ; work         ;
;                |dcfifo_mixed_widths:dcfifo_mixed_widths_component| ; 56 (0)            ; 83 (0)       ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component                                                                             ; work         ;
;                   |dcfifo_cfq1:auto_generated|                     ; 56 (11)           ; 83 (21)      ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated                                                  ; work         ;
;                      |a_gray2bin_g2b:wrptr_g_gray2bin|             ; 6 (6)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_gray2bin_g2b:wrptr_g_gray2bin                  ; work         ;
;                      |a_gray2bin_g2b:ws_dgrp_gray2bin|             ; 6 (6)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_gray2bin_g2b:ws_dgrp_gray2bin                  ; work         ;
;                      |a_graycounter_b5c:wrptr_g1p|                 ; 10 (10)           ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_b5c:wrptr_g1p                      ; work         ;
;                      |a_graycounter_en6:rdptr_g1p|                 ; 11 (11)           ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_en6:rdptr_g1p                      ; work         ;
;                      |alt_synch_pipe_lc8:rs_dgwp|                  ; 0 (0)             ; 14 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp                       ; work         ;
;                         |dffpipe_fd9:dffpipe12|                    ; 0 (0)             ; 14 (14)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp|dffpipe_fd9:dffpipe12 ; work         ;
;                      |alt_synch_pipe_mc8:ws_dgrp|                  ; 0 (0)             ; 14 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp                       ; work         ;
;                         |dffpipe_gd9:dffpipe16|                    ; 0 (0)             ; 14 (14)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp|dffpipe_gd9:dffpipe16 ; work         ;
;                      |altsyncram_rh91:fifo_ram|                    ; 0 (0)             ; 0 (0)        ; 2048              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|altsyncram_rh91:fifo_ram                         ; work         ;
;                      |cmpr_1o5:rdempty_eq_comp|                    ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|cmpr_1o5:rdempty_eq_comp                         ; work         ;
;                      |cmpr_1o5:wrfull_eq_comp|                     ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|cmpr_1o5:wrfull_eq_comp                          ; work         ;
;                      |cntr_qld:cntr_b|                             ; 5 (5)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|cntr_qld:cntr_b                                  ; work         ;
;                      |dffpipe_ed9:ws_brp|                          ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_brp                               ; work         ;
;                      |dffpipe_ed9:ws_bwp|                          ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_bwp                               ; work         ;
;             |ser_uart:C_UART|                                      ; 57 (2)            ; 62 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART                                                                                                                                            ; work         ;
;                |ser_uart_bdgen:C_BDGEN|                            ; 10 (10)           ; 10 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN                                                                                                                     ; work         ;
;                |ser_uart_deser:C_DESER|                            ; 21 (18)           ; 31 (28)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER                                                                                                                     ; work         ;
;                   |ser_data_5_bits_filter:C_FILTER_SIN|            ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|ser_data_5_bits_filter:C_FILTER_SIN                                                                                 ; work         ;
;                |ser_uart_ser:C_SER|                                ; 24 (24)           ; 21 (21)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER                                                                                                                         ; work         ;
;    |U_OnePulse:C_GLOBAL_TRIG_PULSE_DCO|                            ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|U_OnePulse:C_GLOBAL_TRIG_PULSE_DCO                                                                                                                                                                                                               ; work         ;
+--------------------------------------------------------------------+-------------------+--------------+-------------------+------------+------+--------------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM|sl_int_mux                                                                                                                                                                                                                 ;
+----------------------------+--------------------+---------------------+---------------------+-------------------------+---------------------------+----------------------------+----------------------------+------------------------+--------------------------+--------------------------+-----------------+
; Name                       ; sl_int_mux.STOP_RQ ; sl_int_mux.FIFO_L2A ; sl_int_mux.FIFO_L2H ; sl_int_mux.SPILL_HEADER ; sl_int_mux.SPILL_TRAILER2 ; sl_int_mux.SPILL_TRAILER1B ; sl_int_mux.SPILL_TRAILER1A ; sl_int_mux.TRIG_HEADER ; sl_int_mux.TRIG_TRAILER2 ; sl_int_mux.TRIG_TRAILER1 ; sl_int_mux.NONE ;
+----------------------------+--------------------+---------------------+---------------------+-------------------------+---------------------------+----------------------------+----------------------------+------------------------+--------------------------+--------------------------+-----------------+
; sl_int_mux.NONE            ; 0                  ; 0                   ; 0                   ; 0                       ; 0                         ; 0                          ; 0                          ; 0                      ; 0                        ; 0                        ; 0               ;
; sl_int_mux.TRIG_TRAILER1   ; 0                  ; 0                   ; 0                   ; 0                       ; 0                         ; 0                          ; 0                          ; 0                      ; 0                        ; 1                        ; 1               ;
; sl_int_mux.TRIG_TRAILER2   ; 0                  ; 0                   ; 0                   ; 0                       ; 0                         ; 0                          ; 0                          ; 0                      ; 1                        ; 0                        ; 1               ;
; sl_int_mux.TRIG_HEADER     ; 0                  ; 0                   ; 0                   ; 0                       ; 0                         ; 0                          ; 0                          ; 1                      ; 0                        ; 0                        ; 1               ;
; sl_int_mux.SPILL_TRAILER1A ; 0                  ; 0                   ; 0                   ; 0                       ; 0                         ; 0                          ; 1                          ; 0                      ; 0                        ; 0                        ; 1               ;
; sl_int_mux.SPILL_TRAILER1B ; 0                  ; 0                   ; 0                   ; 0                       ; 0                         ; 1                          ; 0                          ; 0                      ; 0                        ; 0                        ; 1               ;
; sl_int_mux.SPILL_TRAILER2  ; 0                  ; 0                   ; 0                   ; 0                       ; 1                         ; 0                          ; 0                          ; 0                      ; 0                        ; 0                        ; 1               ;
; sl_int_mux.SPILL_HEADER    ; 0                  ; 0                   ; 0                   ; 1                       ; 0                         ; 0                          ; 0                          ; 0                      ; 0                        ; 0                        ; 1               ;
; sl_int_mux.FIFO_L2H        ; 0                  ; 0                   ; 1                   ; 0                       ; 0                         ; 0                          ; 0                          ; 0                      ; 0                        ; 0                        ; 1               ;
; sl_int_mux.FIFO_L2A        ; 0                  ; 1                   ; 0                   ; 0                       ; 0                         ; 0                          ; 0                          ; 0                      ; 0                        ; 0                        ; 1               ;
; sl_int_mux.STOP_RQ         ; 1                  ; 0                   ; 0                   ; 0                       ; 0                         ; 0                          ; 0                          ; 0                      ; 0                        ; 0                        ; 1               ;
+----------------------------+--------------------+---------------------+---------------------+-------------------------+---------------------------+----------------------------+----------------------------+------------------------+--------------------------+--------------------------+-----------------+


Encoding Type:  One-Hot
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM|sl_int_state                                                                                                                                                                                                                                         ;
+---------------------------------+-------------------------+------------------------------+--------------------------------+---------------------------------+---------------------------------+-----------------------------+-------------------------------+-------------------------------+----------------------+-------------------+
; Name                            ; sl_int_state.WR_STOP_RQ ; sl_int_state.WR_SPILL_HEADER ; sl_int_state.WR_SPILL_TRAILER2 ; sl_int_state.WR_SPILL_TRAILER1B ; sl_int_state.WR_SPILL_TRAILER1A ; sl_int_state.WR_TRIG_HEADER ; sl_int_state.WR_TRIG_TRAILER2 ; sl_int_state.WR_TRIG_TRAILER1 ; sl_int_state.READOUT ; sl_int_state.STOP ;
+---------------------------------+-------------------------+------------------------------+--------------------------------+---------------------------------+---------------------------------+-----------------------------+-------------------------------+-------------------------------+----------------------+-------------------+
; sl_int_state.STOP               ; 0                       ; 0                            ; 0                              ; 0                               ; 0                               ; 0                           ; 0                             ; 0                             ; 0                    ; 0                 ;
; sl_int_state.READOUT            ; 0                       ; 0                            ; 0                              ; 0                               ; 0                               ; 0                           ; 0                             ; 0                             ; 1                    ; 1                 ;
; sl_int_state.WR_TRIG_TRAILER1   ; 0                       ; 0                            ; 0                              ; 0                               ; 0                               ; 0                           ; 0                             ; 1                             ; 0                    ; 1                 ;
; sl_int_state.WR_TRIG_TRAILER2   ; 0                       ; 0                            ; 0                              ; 0                               ; 0                               ; 0                           ; 1                             ; 0                             ; 0                    ; 1                 ;
; sl_int_state.WR_TRIG_HEADER     ; 0                       ; 0                            ; 0                              ; 0                               ; 0                               ; 1                           ; 0                             ; 0                             ; 0                    ; 1                 ;
; sl_int_state.WR_SPILL_TRAILER1A ; 0                       ; 0                            ; 0                              ; 0                               ; 1                               ; 0                           ; 0                             ; 0                             ; 0                    ; 1                 ;
; sl_int_state.WR_SPILL_TRAILER1B ; 0                       ; 0                            ; 0                              ; 1                               ; 0                               ; 0                           ; 0                             ; 0                             ; 0                    ; 1                 ;
; sl_int_state.WR_SPILL_TRAILER2  ; 0                       ; 0                            ; 1                              ; 0                               ; 0                               ; 0                           ; 0                             ; 0                             ; 0                    ; 1                 ;
; sl_int_state.WR_SPILL_HEADER    ; 0                       ; 1                            ; 0                              ; 0                               ; 0                               ; 0                           ; 0                             ; 0                             ; 0                    ; 1                 ;
; sl_int_state.WR_STOP_RQ         ; 1                       ; 0                            ; 0                              ; 0                               ; 0                               ; 0                           ; 0                             ; 0                             ; 0                    ; 1                 ;
+---------------------------------+-------------------------+------------------------------+--------------------------------+---------------------------------+---------------------------------+-----------------------------+-------------------------------+-------------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_state ;
+-------------------------+------------------------+----------------------+----------------------+-----------------------------------------------------------------------+
; Name                    ; sl_int_state.WAIT_STOP ; sl_int_state.DATA_AV ; sl_int_state.RECEIVE ; sl_int_state.WAIT_START                                               ;
+-------------------------+------------------------+----------------------+----------------------+-----------------------------------------------------------------------+
; sl_int_state.WAIT_START ; 0                      ; 0                    ; 0                    ; 0                                                                     ;
; sl_int_state.RECEIVE    ; 0                      ; 0                    ; 1                    ; 1                                                                     ;
; sl_int_state.DATA_AV    ; 0                      ; 1                    ; 0                    ; 1                                                                     ;
; sl_int_state.WAIT_STOP  ; 1                      ; 0                    ; 0                    ; 1                                                                     ;
+-------------------------+------------------------+----------------------+----------------------+-----------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER|sl_int_state ;
+-------------------------+-------------------+---------------------+-----------------------+--------------------+--------------------+------------------------------+
; Name                    ; sl_int_state.STOP ; sl_int_state.PARITY ; sl_int_state.TRANSMIT ; sl_int_state.START ; sl_int_state.LATCH ; sl_int_state.WAIT_START      ;
+-------------------------+-------------------+---------------------+-----------------------+--------------------+--------------------+------------------------------+
; sl_int_state.WAIT_START ; 0                 ; 0                   ; 0                     ; 0                  ; 0                  ; 0                            ;
; sl_int_state.LATCH      ; 0                 ; 0                   ; 0                     ; 0                  ; 1                  ; 1                            ;
; sl_int_state.START      ; 0                 ; 0                   ; 0                     ; 1                  ; 0                  ; 1                            ;
; sl_int_state.TRANSMIT   ; 0                 ; 0                   ; 1                     ; 0                  ; 0                  ; 1                            ;
; sl_int_state.PARITY     ; 0                 ; 1                   ; 0                     ; 0                  ; 0                  ; 1                            ;
; sl_int_state.STOP       ; 1                 ; 0                   ; 0                     ; 0                  ; 0                  ; 1                            ;
+-------------------------+-------------------+---------------------+-----------------------+--------------------+--------------------+------------------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_state                                                                                                                                                                                                                                                                                                     ;
+--------------------------------+----------------------+------------------+------------------------------+--------------------------------+---------------------------+------------------+--------------------+----------------------+---------------------+-----------------------+--------------------------+----------------------------+-----------------+--------------------------+-------------------+
; Name                           ; sl_int_state.ACK_ERR ; sl_int_state.ERR ; sl_int_state.TX_ERR_WAIT_END ; sl_int_state.TX_ERR_WAIT_START ; sl_int_state.TX_ERR_START ; sl_int_state.ACK ; sl_int_state.RX_RD ; sl_int_state.RX_WAIT ; sl_int_state.TX_END ; sl_int_state.TX_DELAY ; sl_int_state.TX_WAIT_END ; sl_int_state.TX_WAIT_START ; sl_int_state.TX ; sl_int_state.START_FRAME ; sl_int_state.IDLE ;
+--------------------------------+----------------------+------------------+------------------------------+--------------------------------+---------------------------+------------------+--------------------+----------------------+---------------------+-----------------------+--------------------------+----------------------------+-----------------+--------------------------+-------------------+
; sl_int_state.IDLE              ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 0                 ;
; sl_int_state.START_FRAME       ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 1                        ; 1                 ;
; sl_int_state.TX                ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 1               ; 0                        ; 1                 ;
; sl_int_state.TX_WAIT_START     ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 1                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.TX_WAIT_END       ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 1                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.TX_DELAY          ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 1                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.TX_END            ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 1                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.RX_WAIT           ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 1                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.RX_RD             ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 1                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.ACK               ; 0                    ; 0                ; 0                            ; 0                              ; 0                         ; 1                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.TX_ERR_START      ; 0                    ; 0                ; 0                            ; 0                              ; 1                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.TX_ERR_WAIT_START ; 0                    ; 0                ; 0                            ; 1                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.TX_ERR_WAIT_END   ; 0                    ; 0                ; 1                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.ERR               ; 0                    ; 1                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
; sl_int_state.ACK_ERR           ; 1                    ; 0                ; 0                            ; 0                              ; 0                         ; 0                ; 0                  ; 0                    ; 0                   ; 0                     ; 0                        ; 0                          ; 0               ; 0                        ; 1                 ;
+--------------------------------+----------------------+------------------+------------------------------+--------------------------------+---------------------------+------------------+--------------------+----------------------+---------------------+-----------------------+--------------------------+----------------------------+-----------------+--------------------------+-------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET|sl_int_state ;
+--------------------+------------------+--------------------+-------------------------------------------------+
; Name               ; sl_int_state.ACK ; sl_int_state.LATCH ; sl_int_state.IDLE                               ;
+--------------------+------------------+--------------------+-------------------------------------------------+
; sl_int_state.IDLE  ; 0                ; 0                  ; 0                                               ;
; sl_int_state.LATCH ; 0                ; 1                  ; 1                                               ;
; sl_int_state.ACK   ; 1                ; 0                  ; 1                                               ;
+--------------------+------------------+--------------------+-------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_state ;
+--------------------+------------------+------------------+--------------------+------------------------------+
; Name               ; sl_int_state.ERR ; sl_int_state.ACK ; sl_int_state.STORE ; sl_int_state.IDLE            ;
+--------------------+------------------+------------------+--------------------+------------------------------+
; sl_int_state.IDLE  ; 0                ; 0                ; 0                  ; 0                            ;
; sl_int_state.STORE ; 0                ; 0                ; 1                  ; 1                            ;
; sl_int_state.ACK   ; 0                ; 1                ; 0                  ; 1                            ;
; sl_int_state.ERR   ; 1                ; 0                ; 0                  ; 1                            ;
+--------------------+------------------+------------------+--------------------+------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_state                                                              ;
+------------------------------+------------------+------------------------+--------------------+------------------------------+-------------------+
; Name                         ; sl_int_state.ACK ; sl_int_state.CONFIGURE ; sl_int_state.LATCH ; sl_int_state.LOAD_DPRAM_ADDR ; sl_int_state.IDLE ;
+------------------------------+------------------+------------------------+--------------------+------------------------------+-------------------+
; sl_int_state.IDLE            ; 0                ; 0                      ; 0                  ; 0                            ; 0                 ;
; sl_int_state.LOAD_DPRAM_ADDR ; 0                ; 0                      ; 0                  ; 1                            ; 1                 ;
; sl_int_state.LATCH           ; 0                ; 0                      ; 1                  ; 0                            ; 1                 ;
; sl_int_state.CONFIGURE       ; 0                ; 1                      ; 0                  ; 0                            ; 1                 ;
; sl_int_state.ACK             ; 1                ; 0                      ; 0                  ; 0                            ; 1                 ;
+------------------------------+------------------+------------------------+--------------------+------------------------------+-------------------+


Encoding Type:  One-Hot
+----------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL|sl_int_state              ;
+--------------------+------------------+-------------------+--------------------+-------------------+
; Name               ; sl_int_state.ACK ; sl_int_state.SEND ; sl_int_state.RESET ; sl_int_state.IDLE ;
+--------------------+------------------+-------------------+--------------------+-------------------+
; sl_int_state.IDLE  ; 0                ; 0                 ; 0                  ; 0                 ;
; sl_int_state.RESET ; 0                ; 0                 ; 1                  ; 1                 ;
; sl_int_state.SEND  ; 0                ; 1                 ; 0                  ; 1                 ;
; sl_int_state.ACK   ; 1                ; 0                 ; 0                  ; 1                 ;
+--------------------+------------------+-------------------+--------------------+-------------------+


Encoding Type:  One-Hot
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|sl_int_state                                                                                                                                                                                     ;
+------------------------------+------------------+-------------------+-------------------------+------------------------+-------------------+--------------------+------------------------------+-------------------+-------------------------+--------------------------+
; Name                         ; sl_int_state.ACK ; sl_int_state.LOAD ; sl_int_state.LOAD_DELAY ; sl_int_state.NEXT_ASIC ; sl_int_state.SEND ; sl_int_state.LATCH ; sl_int_state.LOAD_DPRAM_ADDR ; sl_int_state.IDLE ; sl_int_state.RESET_READ ; sl_int_state.RESET_PROBE ;
+------------------------------+------------------+-------------------+-------------------------+------------------------+-------------------+--------------------+------------------------------+-------------------+-------------------------+--------------------------+
; sl_int_state.RESET_PROBE     ; 0                ; 0                 ; 0                       ; 0                      ; 0                 ; 0                  ; 0                            ; 0                 ; 0                       ; 0                        ;
; sl_int_state.RESET_READ      ; 0                ; 0                 ; 0                       ; 0                      ; 0                 ; 0                  ; 0                            ; 0                 ; 1                       ; 1                        ;
; sl_int_state.IDLE            ; 0                ; 0                 ; 0                       ; 0                      ; 0                 ; 0                  ; 0                            ; 1                 ; 0                       ; 1                        ;
; sl_int_state.LOAD_DPRAM_ADDR ; 0                ; 0                 ; 0                       ; 0                      ; 0                 ; 0                  ; 1                            ; 0                 ; 0                       ; 1                        ;
; sl_int_state.LATCH           ; 0                ; 0                 ; 0                       ; 0                      ; 0                 ; 1                  ; 0                            ; 0                 ; 0                       ; 1                        ;
; sl_int_state.SEND            ; 0                ; 0                 ; 0                       ; 0                      ; 1                 ; 0                  ; 0                            ; 0                 ; 0                       ; 1                        ;
; sl_int_state.NEXT_ASIC       ; 0                ; 0                 ; 0                       ; 1                      ; 0                 ; 0                  ; 0                            ; 0                 ; 0                       ; 1                        ;
; sl_int_state.LOAD_DELAY      ; 0                ; 0                 ; 1                       ; 0                      ; 0                 ; 0                  ; 0                            ; 0                 ; 0                       ; 1                        ;
; sl_int_state.LOAD            ; 0                ; 1                 ; 0                       ; 0                      ; 0                 ; 0                  ; 0                            ; 0                 ; 0                       ; 1                        ;
; sl_int_state.ACK             ; 1                ; 0                 ; 0                       ; 0                      ; 0                 ; 0                  ; 0                            ; 0                 ; 0                       ; 1                        ;
+------------------------------+------------------+-------------------+-------------------------+------------------------+-------------------+--------------------+------------------------------+-------------------+-------------------------+--------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_watchdog_state                ;
+---------------------------------+-----------------------------+---------------------------------+---------------------------------+---------------------------+
; Name                            ; sl_int_watchdog_state.ERROR ; sl_int_watchdog_state.STARTED_H ; sl_int_watchdog_state.STARTED_L ; sl_int_watchdog_state.OFF ;
+---------------------------------+-----------------------------+---------------------------------+---------------------------------+---------------------------+
; sl_int_watchdog_state.OFF       ; 0                           ; 0                               ; 0                               ; 0                         ;
; sl_int_watchdog_state.STARTED_L ; 0                           ; 0                               ; 1                               ; 1                         ;
; sl_int_watchdog_state.STARTED_H ; 0                           ; 1                               ; 0                               ; 1                         ;
; sl_int_watchdog_state.ERROR     ; 1                           ; 0                               ; 0                               ; 1                         ;
+---------------------------------+-----------------------------+---------------------------------+---------------------------------+---------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_send_state       ;
+------------------------------+----------------------------+------------------------------+------------------------------+------------------------+
; Name                         ; sl_int_send_state.SEND_END ; sl_int_send_state.SEND_CLK_L ; sl_int_send_state.SEND_CLK_H ; sl_int_send_state.IDLE ;
+------------------------------+----------------------------+------------------------------+------------------------------+------------------------+
; sl_int_send_state.IDLE       ; 0                          ; 0                            ; 0                            ; 0                      ;
; sl_int_send_state.SEND_CLK_H ; 0                          ; 0                            ; 1                            ; 1                      ;
; sl_int_send_state.SEND_CLK_L ; 0                          ; 1                            ; 0                            ; 1                      ;
; sl_int_send_state.SEND_END   ; 1                          ; 0                            ; 0                            ; 1                      ;
+------------------------------+----------------------------+------------------------------+------------------------------+------------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state                                                                                                                                                                                                                                                                                                                                                                                                                                                                      ;
+--------------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+------------------------+------------------------+------------------------+------------------------+------------------------+--------------------------+---------------------+------------------------------+-----------------------+--------------------------------+----------------------+-------------------------------+------------------+---------------------------+------------------+----------------------+
; Name                           ; sl_int_state.WAIT_TEST_SEQ5 ; sl_int_state.WAIT_TEST_SEQ4 ; sl_int_state.WAIT_TEST_SEQ3 ; sl_int_state.WAIT_TEST_SEQ2 ; sl_int_state.WAIT_TEST_SEQ1 ; sl_int_state.TEST_SEQ5 ; sl_int_state.TEST_SEQ4 ; sl_int_state.TEST_SEQ3 ; sl_int_state.TEST_SEQ2 ; sl_int_state.TEST_SEQ1 ; sl_int_state.INITIALIZED ; sl_int_state.OUTADJ ; sl_int_state.WAIT_FOR_OUTADJ ; sl_int_state.OUTPHASE ; sl_int_state.WAIT_FOR_OUTPHASE ; sl_int_state.OUTMODE ; sl_int_state.WAIT_FOR_OUTMODE ; sl_int_state.NOP ; sl_int_state.WAIT_FOR_NOP ; sl_int_state.RST ; sl_int_state.WAIT_PO ;
+--------------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+------------------------+------------------------+------------------------+------------------------+------------------------+--------------------------+---------------------+------------------------------+-----------------------+--------------------------------+----------------------+-------------------------------+------------------+---------------------------+------------------+----------------------+
; sl_int_state.WAIT_PO           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 0                    ;
; sl_int_state.RST               ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 1                ; 1                    ;
; sl_int_state.WAIT_FOR_NOP      ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 1                         ; 0                ; 1                    ;
; sl_int_state.NOP               ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 1                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_FOR_OUTMODE  ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 1                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.OUTMODE           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 1                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_FOR_OUTPHASE ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 1                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.OUTPHASE          ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 1                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_FOR_OUTADJ   ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 1                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.OUTADJ            ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 1                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.INITIALIZED       ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 1                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.TEST_SEQ1         ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 1                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.TEST_SEQ2         ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 1                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.TEST_SEQ3         ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 1                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.TEST_SEQ4         ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 1                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.TEST_SEQ5         ; 0                           ; 0                           ; 0                           ; 0                           ; 0                           ; 1                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_TEST_SEQ1    ; 0                           ; 0                           ; 0                           ; 0                           ; 1                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_TEST_SEQ2    ; 0                           ; 0                           ; 0                           ; 1                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_TEST_SEQ3    ; 0                           ; 0                           ; 1                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_TEST_SEQ4    ; 0                           ; 1                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
; sl_int_state.WAIT_TEST_SEQ5    ; 1                           ; 0                           ; 0                           ; 0                           ; 0                           ; 0                      ; 0                      ; 0                      ; 0                      ; 0                      ; 0                        ; 0                   ; 0                            ; 0                     ; 0                              ; 0                    ; 0                             ; 0                ; 0                         ; 0                ; 1                    ;
+--------------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+-----------------------------+------------------------+------------------------+------------------------+------------------------+------------------------+--------------------------+---------------------+------------------------------+-----------------------+--------------------------------+----------------------+-------------------------------+------------------+---------------------------+------------------+----------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_state[0] ;
+------------------------------+----------------------+-----------------------+--------------------------------------------------------------------+
; Name                         ; sl_int_state[0].HOLD ; sl_int_state[0].COUNT ; sl_int_state[0].WAIT_SYNCHRO                                       ;
+------------------------------+----------------------+-----------------------+--------------------------------------------------------------------+
; sl_int_state[0].WAIT_SYNCHRO ; 0                    ; 0                     ; 0                                                                  ;
; sl_int_state[0].COUNT        ; 0                    ; 1                     ; 1                                                                  ;
; sl_int_state[0].HOLD         ; 1                    ; 0                     ; 1                                                                  ;
+------------------------------+----------------------+-----------------------+--------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_state[1] ;
+------------------------------+----------------------+-----------------------+--------------------------------------------------------------------+
; Name                         ; sl_int_state[1].HOLD ; sl_int_state[1].COUNT ; sl_int_state[1].WAIT_SYNCHRO                                       ;
+------------------------------+----------------------+-----------------------+--------------------------------------------------------------------+
; sl_int_state[1].WAIT_SYNCHRO ; 0                    ; 0                     ; 0                                                                  ;
; sl_int_state[1].COUNT        ; 0                    ; 1                     ; 1                                                                  ;
; sl_int_state[1].HOLD         ; 1                    ; 0                     ; 1                                                                  ;
+------------------------------+----------------------+-----------------------+--------------------------------------------------------------------+


Encoding Type:  One-Hot
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_state                                                                                                                              ;
+-------------------------------+----------------------+-------------------------------+-----------------------+----------------------+-----------------------+----------------------+------------------------+-------------------------+------------------------+
; Name                          ; sl_int_state.COMPUTE ; sl_int_state.WAIT_SYNCHRO_OFF ; sl_int_state.RESET_PA ; sl_int_state.COMPARE ; sl_int_state.BASELINE ; sl_int_state.STARTED ; sl_int_state.ADC_DELAY ; sl_int_state.HOLD_DELAY ; sl_int_state.END_CYCLE ;
+-------------------------------+----------------------+-------------------------------+-----------------------+----------------------+-----------------------+----------------------+------------------------+-------------------------+------------------------+
; sl_int_state.END_CYCLE        ; 0                    ; 0                             ; 0                     ; 0                    ; 0                     ; 0                    ; 0                      ; 0                       ; 0                      ;
; sl_int_state.HOLD_DELAY       ; 0                    ; 0                             ; 0                     ; 0                    ; 0                     ; 0                    ; 0                      ; 1                       ; 1                      ;
; sl_int_state.ADC_DELAY        ; 0                    ; 0                             ; 0                     ; 0                    ; 0                     ; 0                    ; 1                      ; 0                       ; 1                      ;
; sl_int_state.STARTED          ; 0                    ; 0                             ; 0                     ; 0                    ; 0                     ; 1                    ; 0                      ; 0                       ; 1                      ;
; sl_int_state.BASELINE         ; 0                    ; 0                             ; 0                     ; 0                    ; 1                     ; 0                    ; 0                      ; 0                       ; 1                      ;
; sl_int_state.COMPARE          ; 0                    ; 0                             ; 0                     ; 1                    ; 0                     ; 0                    ; 0                      ; 0                       ; 1                      ;
; sl_int_state.RESET_PA         ; 0                    ; 0                             ; 1                     ; 0                    ; 0                     ; 0                    ; 0                      ; 0                       ; 1                      ;
; sl_int_state.WAIT_SYNCHRO_OFF ; 0                    ; 1                             ; 0                     ; 0                    ; 0                     ; 0                    ; 0                      ; 0                       ; 1                      ;
; sl_int_state.COMPUTE          ; 1                    ; 0                             ; 0                     ; 0                    ; 0                     ; 0                    ; 0                      ; 0                       ; 1                      ;
+-------------------------------+----------------------+-------------------------------+-----------------------+----------------------+-----------------------+----------------------+------------------------+-------------------------+------------------------+


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver|sl_int_state     ;
+---------------------------+----------------------+-------------------+-----------------------+---------------------------+--------------------+
; Name                      ; sl_int_state.DATA_AV ; sl_int_state.SYNC ; sl_int_state.WAIT_FCO ; sl_int_state.WAIT_1ST_FCO ; sl_int_state.START ;
+---------------------------+----------------------+-------------------+-----------------------+---------------------------+--------------------+
; sl_int_state.START        ; 0                    ; 0                 ; 0                     ; 0                         ; 0                  ;
; sl_int_state.WAIT_1ST_FCO ; 0                    ; 0                 ; 0                     ; 1                         ; 1                  ;
; sl_int_state.WAIT_FCO     ; 0                    ; 0                 ; 1                     ; 0                         ; 1                  ;
; sl_int_state.SYNC         ; 0                    ; 1                 ; 0                     ; 0                         ; 1                  ;
; sl_int_state.DATA_AV      ; 1                    ; 0                 ; 0                     ; 0                         ; 1                  ;
+---------------------------+----------------------+-------------------+-----------------------+---------------------------+--------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX|sl_int_state                                                       ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; Name                         ; sl_int_state.COMPUTE_OUT ; sl_int_state.BASELINE_OUT ; sl_int_state.COMPARE_DYNAMIC ; sl_int_state.COMPARE_HIT ; sl_int_state.COMPARE_STATIC ; sl_int_state.COMPUTE ; sl_int_state.NONE ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+
; sl_int_state.NONE            ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 0                 ;
; sl_int_state.COMPUTE         ; 0                        ; 0                         ; 0                            ; 0                        ; 0                           ; 1                    ; 1                 ;
; sl_int_state.COMPARE_STATIC  ; 0                        ; 0                         ; 0                            ; 0                        ; 1                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_HIT     ; 0                        ; 0                         ; 0                            ; 1                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPARE_DYNAMIC ; 0                        ; 0                         ; 1                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.BASELINE_OUT    ; 0                        ; 1                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
; sl_int_state.COMPUTE_OUT     ; 1                        ; 0                         ; 0                            ; 0                        ; 0                           ; 0                    ; 1                 ;
+------------------------------+--------------------------+---------------------------+------------------------------+--------------------------+-----------------------------+----------------------+-------------------+


Encoding Type:  One-Hot
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_state ;
+-------------------------+------------------------+----------------------+----------------------+------------------------------------------------------------------------+
; Name                    ; sl_int_state.WAIT_STOP ; sl_int_state.DATA_AV ; sl_int_state.RECEIVE ; sl_int_state.WAIT_START                                                ;
+-------------------------+------------------------+----------------------+----------------------+------------------------------------------------------------------------+
; sl_int_state.WAIT_START ; 0                      ; 0                    ; 0                    ; 0                                                                      ;
; sl_int_state.RECEIVE    ; 0                      ; 0                    ; 1                    ; 1                                                                      ;
; sl_int_state.DATA_AV    ; 0                      ; 1                    ; 0                    ; 1                                                                      ;
; sl_int_state.WAIT_STOP  ; 1                      ; 0                    ; 0                    ; 1                                                                      ;
+-------------------------+------------------------+----------------------+----------------------+------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER|sl_int_state ;
+-------------------------+-------------------+---------------------+-----------------------+--------------------+--------------------+-------------------------------+
; Name                    ; sl_int_state.STOP ; sl_int_state.PARITY ; sl_int_state.TRANSMIT ; sl_int_state.START ; sl_int_state.LATCH ; sl_int_state.WAIT_START       ;
+-------------------------+-------------------+---------------------+-----------------------+--------------------+--------------------+-------------------------------+
; sl_int_state.WAIT_START ; 0                 ; 0                   ; 0                     ; 0                  ; 0                  ; 0                             ;
; sl_int_state.LATCH      ; 0                 ; 0                   ; 0                     ; 0                  ; 1                  ; 1                             ;
; sl_int_state.START      ; 0                 ; 0                   ; 0                     ; 1                  ; 0                  ; 1                             ;
; sl_int_state.TRANSMIT   ; 0                 ; 0                   ; 1                     ; 0                  ; 0                  ; 1                             ;
; sl_int_state.PARITY     ; 0                 ; 1                   ; 0                     ; 0                  ; 0                  ; 1                             ;
; sl_int_state.STOP       ; 1                 ; 0                   ; 0                     ; 0                  ; 0                  ; 1                             ;
+-------------------------+-------------------+---------------------+-----------------------+--------------------+--------------------+-------------------------------+


Encoding Type:  One-Hot
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_process_state                                                                                                                                                                                                                                                                       ;
+-----------------------------------------+--------------------------+---------------------------------------+-----------------------------------+---------------------------------------+-----------------------------------+-----------------------------------------+----------------------------------------+---------------------------------------+---------------------------+
; Name                                    ; sl_int_process_state.ACK ; sl_int_process_state.SET_USER_SET_CMD ; sl_int_process_state.SET_USER_SET ; sl_int_process_state.APPLY_CONFIG_END ; sl_int_process_state.APPLY_CONFIG ; sl_int_process_state.APPLY_CONFIG_START ; sl_int_process_state.SET_READOUT_PARAM ; sl_int_process_state.SET_DIRECT_PARAM ; sl_int_process_state.IDLE ;
+-----------------------------------------+--------------------------+---------------------------------------+-----------------------------------+---------------------------------------+-----------------------------------+-----------------------------------------+----------------------------------------+---------------------------------------+---------------------------+
; sl_int_process_state.IDLE               ; 0                        ; 0                                     ; 0                                 ; 0                                     ; 0                                 ; 0                                       ; 0                                      ; 0                                     ; 0                         ;
; sl_int_process_state.SET_DIRECT_PARAM   ; 0                        ; 0                                     ; 0                                 ; 0                                     ; 0                                 ; 0                                       ; 0                                      ; 1                                     ; 1                         ;
; sl_int_process_state.SET_READOUT_PARAM  ; 0                        ; 0                                     ; 0                                 ; 0                                     ; 0                                 ; 0                                       ; 1                                      ; 0                                     ; 1                         ;
; sl_int_process_state.APPLY_CONFIG_START ; 0                        ; 0                                     ; 0                                 ; 0                                     ; 0                                 ; 1                                       ; 0                                      ; 0                                     ; 1                         ;
; sl_int_process_state.APPLY_CONFIG       ; 0                        ; 0                                     ; 0                                 ; 0                                     ; 1                                 ; 0                                       ; 0                                      ; 0                                     ; 1                         ;
; sl_int_process_state.APPLY_CONFIG_END   ; 0                        ; 0                                     ; 0                                 ; 1                                     ; 0                                 ; 0                                       ; 0                                      ; 0                                     ; 1                         ;
; sl_int_process_state.SET_USER_SET       ; 0                        ; 0                                     ; 1                                 ; 0                                     ; 0                                 ; 0                                       ; 0                                      ; 0                                     ; 1                         ;
; sl_int_process_state.SET_USER_SET_CMD   ; 0                        ; 1                                     ; 0                                 ; 0                                     ; 0                                 ; 0                                       ; 0                                      ; 0                                     ; 1                         ;
; sl_int_process_state.ACK                ; 1                        ; 0                                     ; 0                                 ; 0                                     ; 0                                 ; 0                                       ; 0                                      ; 0                                     ; 1                         ;
+-----------------------------------------+--------------------------+---------------------------------------+-----------------------------------+---------------------------------------+-----------------------------------+-----------------------------------------+----------------------------------------+---------------------------------------+---------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_state                                                                                                                                                                                                                                                                                                                                                                                                                                                                                               ;
+-----------------------------------------+--------------------------+-------------------------+------------------------+--------------------------------------+---------------------------------------+-----------------------------------------+-----------------------------------------+-----------------------------------+-----------------------------------+-------------------------------------+-------------------------------+-------------------------------+-------------------------+-------------------------+--------------------------------+-----------------+-------------------+
; Name                                    ; sl_int_state.CHECK_VALID ; sl_int_state.CMD_ANSWER ; sl_int_state.WAIT_FIFO ; sl_int_state.CMD_SET_CONFIG_WAIT_CRC ; sl_int_state.CMD_SET_CONFIG_START_CRC ; sl_int_state.CMD_SET_CONFIG_ARG_PROCESS ; sl_int_state.CMD_SET_CONFIG_CMD_PROCESS ; sl_int_state.CMD_SET_CONFIG_VALID ; sl_int_state.CMD_2FRM_PROCESS_END ; sl_int_state.CMD_2FRM_PROCESS_CHECK ; sl_int_state.CMD_2FRM_PROCESS ; sl_int_state.CMD_1FRM_PROCESS ; sl_int_state.CMD_DECODE ; sl_int_state.ADD_DECODE ; sl_int_state.CMD_NOT_ADRRESSED ; sl_int_state.RD ; sl_int_state.IDLE ;
+-----------------------------------------+--------------------------+-------------------------+------------------------+--------------------------------------+---------------------------------------+-----------------------------------------+-----------------------------------------+-----------------------------------+-----------------------------------+-------------------------------------+-------------------------------+-------------------------------+-------------------------+-------------------------+--------------------------------+-----------------+-------------------+
; sl_int_state.IDLE                       ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 0                 ;
; sl_int_state.RD                         ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 1               ; 1                 ;
; sl_int_state.CMD_NOT_ADRRESSED          ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 1                              ; 0               ; 1                 ;
; sl_int_state.ADD_DECODE                 ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 1                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_DECODE                 ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 1                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_1FRM_PROCESS           ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 1                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_2FRM_PROCESS           ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 1                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_2FRM_PROCESS_CHECK     ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 1                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_2FRM_PROCESS_END       ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 1                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_SET_CONFIG_VALID       ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 1                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_SET_CONFIG_CMD_PROCESS ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 1                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_SET_CONFIG_ARG_PROCESS ; 0                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 1                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_SET_CONFIG_START_CRC   ; 0                        ; 0                       ; 0                      ; 0                                    ; 1                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_SET_CONFIG_WAIT_CRC    ; 0                        ; 0                       ; 0                      ; 1                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.WAIT_FIFO                  ; 0                        ; 0                       ; 1                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CMD_ANSWER                 ; 0                        ; 1                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
; sl_int_state.CHECK_VALID                ; 1                        ; 0                       ; 0                      ; 0                                    ; 0                                     ; 0                                       ; 0                                       ; 0                                 ; 0                                 ; 0                                   ; 0                             ; 0                             ; 0                       ; 0                       ; 0                              ; 0               ; 1                 ;
+-----------------------------------------+--------------------------+-------------------------+------------------------+--------------------------------------+---------------------------------------+-----------------------------------------+-----------------------------------------+-----------------------------------+-----------------------------------+-------------------------------------+-------------------------------+-------------------------------+-------------------------+-------------------------+--------------------------------+-----------------+-------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_state                                                                                                                                                                                                                                                                                                            ;
+----------------------------------------+------------------+-----------------+--------------------------------+---------------------+---------------------------+-----------------------------+----------------------------------------+----------------------------------+-----------------------------------+-----------------------------+--------------------------+-------------------------+-------------------+
; Name                                   ; sl_int_state.ACK ; sl_int_state.WR ; sl_int_state.GET_USER_CMD_WAIT ; sl_int_state.ANSWER ; sl_int_state.GET_USER_CMD ; sl_int_state.GET_CONFIG_END ; sl_int_state.GET_CONFIG_ARG_CHECK_FIFO ; sl_int_state.GET_CONFIG_WAIT_CRC ; sl_int_state.GET_CONFIG_START_CRC ; sl_int_state.GET_CONFIG_CMD ; sl_int_state.READ_STATUS ; sl_int_state.FW_VERSION ; sl_int_state.IDLE ;
+----------------------------------------+------------------+-----------------+--------------------------------+---------------------+---------------------------+-----------------------------+----------------------------------------+----------------------------------+-----------------------------------+-----------------------------+--------------------------+-------------------------+-------------------+
; sl_int_state.IDLE                      ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 0                 ;
; sl_int_state.FW_VERSION                ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 1                       ; 1                 ;
; sl_int_state.READ_STATUS               ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 1                        ; 0                       ; 1                 ;
; sl_int_state.GET_CONFIG_CMD            ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 1                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.GET_CONFIG_START_CRC      ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 1                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.GET_CONFIG_WAIT_CRC       ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 1                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.GET_CONFIG_ARG_CHECK_FIFO ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 1                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.GET_CONFIG_END            ; 0                ; 0               ; 0                              ; 0                   ; 0                         ; 1                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.GET_USER_CMD              ; 0                ; 0               ; 0                              ; 0                   ; 1                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.ANSWER                    ; 0                ; 0               ; 0                              ; 1                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.GET_USER_CMD_WAIT         ; 0                ; 0               ; 1                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.WR                        ; 0                ; 1               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
; sl_int_state.ACK                       ; 1                ; 0               ; 0                              ; 0                   ; 0                         ; 0                           ; 0                                      ; 0                                ; 0                                 ; 0                           ; 0                        ; 0                       ; 1                 ;
+----------------------------------------+------------------+-----------------+--------------------------------+---------------------+---------------------------+-----------------------------+----------------------------------------+----------------------------------+-----------------------------------+-----------------------------+--------------------------+-------------------------+-------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC|sl_int_state ;
+-------------------------+---------------------+----------------------+---------------------------------------------------------+
; Name                    ; sl_int_state.CRC_AV ; sl_int_state.COMPUTE ; sl_int_state.WAIT_START                                 ;
+-------------------------+---------------------+----------------------+---------------------------------------------------------+
; sl_int_state.WAIT_START ; 0                   ; 0                    ; 0                                                       ;
; sl_int_state.COMPUTE    ; 0                   ; 1                    ; 1                                                       ;
; sl_int_state.CRC_AV     ; 1                   ; 0                    ; 1                                                       ;
+-------------------------+---------------------+----------------------+---------------------------------------------------------+


Encoding Type:  One-Hot
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|sl_int_start_state                                                                                           ;
+----------------------------+----------------------------+---------------------------+---------------------------+---------------------------+---------------------------+--------------------------+
; Name                       ; sl_int_start_state.STARTED ; sl_int_start_state.START4 ; sl_int_start_state.START3 ; sl_int_start_state.START2 ; sl_int_start_state.START1 ; sl_int_start_state.START ;
+----------------------------+----------------------------+---------------------------+---------------------------+---------------------------+---------------------------+--------------------------+
; sl_int_start_state.START   ; 0                          ; 0                         ; 0                         ; 0                         ; 0                         ; 0                        ;
; sl_int_start_state.START1  ; 0                          ; 0                         ; 0                         ; 0                         ; 1                         ; 1                        ;
; sl_int_start_state.START2  ; 0                          ; 0                         ; 0                         ; 1                         ; 0                         ; 1                        ;
; sl_int_start_state.START3  ; 0                          ; 0                         ; 1                         ; 0                         ; 0                         ; 1                        ;
; sl_int_start_state.START4  ; 0                          ; 1                         ; 0                         ; 0                         ; 0                         ; 1                        ;
; sl_int_start_state.STARTED ; 1                          ; 0                         ; 0                         ; 0                         ; 0                         ; 1                        ;
+----------------------------+----------------------------+---------------------------+---------------------------+---------------------------+---------------------------+--------------------------+


Encoding Type:  One-Hot
+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|sl_int_state                                                                                                                         ;
+--------------------------------+------------------------+-------------------------+------------------+--------------------------------+-----------------+-------------------------+-------------------+--------------------+
; Name                           ; sl_int_state.CHECK_ZLP ; sl_int_state.WAIT_FLAGA ; sl_int_state.ZLP ; sl_int_state.WAIT_TX_NOT_EMPTY ; sl_int_state.WR ; sl_int_state.WAIT_FLAGB ; sl_int_state.IDLE ; sl_int_state.START ;
+--------------------------------+------------------------+-------------------------+------------------+--------------------------------+-----------------+-------------------------+-------------------+--------------------+
; sl_int_state.START             ; 0                      ; 0                       ; 0                ; 0                              ; 0               ; 0                       ; 0                 ; 0                  ;
; sl_int_state.IDLE              ; 0                      ; 0                       ; 0                ; 0                              ; 0               ; 0                       ; 1                 ; 1                  ;
; sl_int_state.WAIT_FLAGB        ; 0                      ; 0                       ; 0                ; 0                              ; 0               ; 1                       ; 0                 ; 1                  ;
; sl_int_state.WR                ; 0                      ; 0                       ; 0                ; 0                              ; 1               ; 0                       ; 0                 ; 1                  ;
; sl_int_state.WAIT_TX_NOT_EMPTY ; 0                      ; 0                       ; 0                ; 1                              ; 0               ; 0                       ; 0                 ; 1                  ;
; sl_int_state.ZLP               ; 0                      ; 0                       ; 1                ; 0                              ; 0               ; 0                       ; 0                 ; 1                  ;
; sl_int_state.WAIT_FLAGA        ; 0                      ; 1                       ; 0                ; 0                              ; 0               ; 0                       ; 0                 ; 1                  ;
; sl_int_state.CHECK_ZLP         ; 1                      ; 0                       ; 0                ; 0                              ; 0               ; 0                       ; 0                 ; 1                  ;
+--------------------------------+------------------------+-------------------------+------------------+--------------------------------+-----------------+-------------------------+-------------------+--------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by Synthesis                                                                                                                                                                                                       ;
+------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; Register Name                                                                                                          ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
+------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[391]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[388]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[397]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][2]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[389]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[390]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[314]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[1][4]                                                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[1][0]                                                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[1][1]                                                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[1][2]                                                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[291]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[0]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[1]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[2]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[3]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[4]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[5]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[6]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[7]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[8]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[9]                                                                 ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[10]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[11]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[12]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[13]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[14]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[15]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[16]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[17]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[18]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[19]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[20]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[21]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[22]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[23]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[24]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[25]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[26]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[27]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[28]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[29]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[30]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[31]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[97]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[98]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[99]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[100]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[101]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[102]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[103]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[104]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[105]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[106]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[107]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[108]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[109]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[110]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[111]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[112]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[113]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[114]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[115]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[116]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[117]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[118]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[119]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[120]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[121]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[122]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[123]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[124]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[125]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[126]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[127]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[128]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[194]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[195]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[196]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[197]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[198]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[199]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[200]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[201]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[202]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[203]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[204]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[205]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[206]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[207]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[208]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[209]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[210]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[211]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[212]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[213]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[214]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[215]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[216]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[217]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[218]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[219]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[220]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[221]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[222]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[223]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[224]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[225]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[345]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[292]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[399]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[400]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[401]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[402]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[403]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[404]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[407]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[444]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[443]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[442]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[441]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[440]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[439]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[438]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[437]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[436]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[435]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[434]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[433]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[432]                                                               ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_clear[1]     ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[1][5]                                                                                               ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_nreset[1][0] ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[413]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[457]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[456]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[455]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[454]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[453]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[452]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[451]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[450]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[449]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[448]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[447]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[446]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[445]                                                               ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_nreset[1][1] ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][2]                                                                                                  ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][3]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[405]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[406]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[330]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][9]                                                                                                  ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[0][4]                                                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[0][0]                                                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][7]                                                                                                  ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][8]                                                                                                  ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[0][1]                                                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[0][2]                                                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[307]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[32]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[33]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[34]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[35]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[36]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[37]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[38]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[39]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[40]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[41]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[42]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[43]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[44]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[45]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[46]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[47]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[129]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[130]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[131]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[132]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[133]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[134]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[135]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[136]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[137]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[138]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[139]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[140]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[141]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[142]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[143]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[144]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[226]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[227]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[228]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[229]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[230]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[231]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[232]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[233]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[234]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[235]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[236]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[237]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[238]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[239]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[240]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[241]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[361]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[308]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[415]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[416]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[417]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[418]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[419]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[420]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[423]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[398]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[460]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[459]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[458]                                                               ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_clear[0]     ; yes                                                              ; yes                                        ;
; sl_int_meta_clk400[0][5]                                                                                               ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_nreset[0][0] ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[429]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[473]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[472]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[471]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[470]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[469]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[468]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[467]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[466]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[465]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[464]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[463]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[462]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[461]                                                               ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_nreset[0][1] ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][3]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_start[1]     ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[421]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[422]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[346]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][9]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[340]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][7]                                                                                                  ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][8]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[323]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[48]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[49]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[50]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[51]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[52]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[53]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[54]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[55]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[56]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[57]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[58]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[59]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[60]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[61]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[62]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[63]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[145]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[146]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[147]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[148]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[149]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[150]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[151]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[152]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[153]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[154]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[155]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[156]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[157]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[158]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[159]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[160]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[242]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[243]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[244]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[245]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[246]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[247]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[248]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[249]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[250]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[251]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[252]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[253]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[254]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[255]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[256]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[257]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[377]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[324]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[431]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[294]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][0]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[414]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][0]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][0]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][0]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][0]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][0]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][2]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][2]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][2]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][2]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][2]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][1]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][1]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][1]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][1]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][1]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][3]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][3]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][3]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][3]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][3]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][4]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][4]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][4]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][4]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][4]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][6]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][6]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][6]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][6]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][6]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][5]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][5]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][5]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][5]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][5]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[0][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[2][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[1][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[3][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[4][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[6][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[5][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[7][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[8][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[10][7]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[9][7]                                     ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[11][7]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[12][7]                                    ; yes                                                              ; yes                                        ;
; AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_int_reg[13][7]                                    ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[476]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[475]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[474]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[392]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[343]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[489]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[488]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[487]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[486]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[485]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[484]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[483]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[482]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[481]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[480]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[479]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[478]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[477]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[322]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[321]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[320]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[319]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[318]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[317]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[316]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[315]                                                               ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_start[0]     ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[362]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[341]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[412]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[411]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[410]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[409]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[408]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][1]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[356]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[339]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[64]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[65]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[66]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[67]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[68]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[69]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[70]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[71]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[72]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[73]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[74]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[75]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[76]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[77]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[78]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[79]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[161]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[162]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[163]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[164]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[165]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[166]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[167]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[168]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[169]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[170]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[171]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[172]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[173]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[174]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[175]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[176]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[258]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[259]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[260]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[261]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[262]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[263]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[264]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[265]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[266]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[267]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[268]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[269]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[270]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[271]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[272]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[273]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[393]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[310]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][0]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[430]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[492]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[491]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[490]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[493]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[494]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[495]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[496]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[497]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[498]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[499]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[500]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[501]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[502]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[503]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[504]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[505]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[506]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[507]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[508]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[509]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[510]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[511]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[512]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[513]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[514]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[515]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[516]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[517]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[518]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[519]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[520]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[521]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[522]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[523]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[524]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[525]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[526]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[527]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[528]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[529]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[530]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[531]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[532]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[533]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[534]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[535]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[536]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[537]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[538]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[539]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[540]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[541]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[542]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[543]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[544]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[545]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[546]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[547]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[548]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[549]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[550]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[551]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[552]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[553]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[359]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[338]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[337]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[336]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[335]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[334]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[333]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[332]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[331]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[378]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[357]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][5]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[428]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[427]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[426]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[425]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[424]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[372]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[353]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[354]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[355]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[358]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[360]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[363]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[364]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[365]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[366]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[367]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[368]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[80]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[81]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[82]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[83]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[84]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[85]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[86]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[87]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[88]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[89]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[90]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[91]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[92]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[93]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[94]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[95]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[177]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[178]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[179]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[180]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[181]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[182]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[183]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[184]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[185]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[186]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[187]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[188]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[189]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[190]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[191]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[192]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[274]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[275]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[276]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[277]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[278]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[279]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[280]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[281]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[282]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[283]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[284]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[285]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[286]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[287]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[288]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[289]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[326]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[554]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[555]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[556]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[557]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[558]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[559]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[560]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[561]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[562]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[563]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[564]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[565]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[566]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[567]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[568]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[569]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[375]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[352]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[351]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[350]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[349]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[348]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[347]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[394]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][6]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[373]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][5]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[369]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[370]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[371]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[374]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[376]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[379]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[380]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[381]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[382]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[383]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[384]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[96]                                                                ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[193]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[290]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[293]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[295]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[296]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[297]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[298]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[299]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[300]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[301]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[302]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[303]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[304]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[305]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[342]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[570]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[571]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[572]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[573]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[574]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[575]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[576]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[577]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[578]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[579]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[580]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[581]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[582]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[583]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[584]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[585]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][4]                                                                                                  ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][6]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[385]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[386]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[387]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[395]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[396]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[306]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[309]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[311]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[312]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[313]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[586]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[587]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[588]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[589]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[590]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[591]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[592]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[593]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[594]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[595]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[596]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[597]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[598]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[599]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[600]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[601]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][4]                                                                                                  ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[329]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[328]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[327]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[325]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[602]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[603]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[604]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[605]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[606]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[607]                                                               ; yes                                                              ; yes                                        ;
; AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|sl_int_reg[344]                                                               ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][77]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][45]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][13]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][77]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][78]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][45]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][46]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][13]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][14]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][78]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][79]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][46]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][47]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][14]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][15]                                                                                                 ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[16][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[20][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[24][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[28][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[18][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[22][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[26][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[30][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[17][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[21][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[25][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[29][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[19][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[23][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[27][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[31][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[8][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[10][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[9][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[11][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[12][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[14][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[13][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[15][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[0][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[2][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[1][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[3][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[4][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[6][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[5][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[7][0]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[48][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[52][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[56][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[60][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[50][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[54][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[58][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[62][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[49][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[53][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[57][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[61][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[51][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[55][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[59][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[63][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[40][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[42][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[41][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[43][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[44][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[46][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[45][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[47][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[32][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[34][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[33][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[35][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[36][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[38][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[37][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[39][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[80][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[84][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[88][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[92][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[82][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[86][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[90][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[94][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[81][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[85][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[89][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[93][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[83][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[87][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[91][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[95][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[72][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[74][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[73][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[75][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[76][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[78][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[77][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[79][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[64][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[66][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[65][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[67][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[68][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[70][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[69][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[71][0]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[16][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[20][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[24][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[28][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[18][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[22][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[26][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[30][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[17][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[21][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[25][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[29][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[19][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[23][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[27][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[31][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[8][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[10][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[9][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[11][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[12][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[14][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[13][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[15][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[0][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[2][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[1][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[3][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[4][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[6][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[5][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[7][1]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[48][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[52][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[56][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[60][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[50][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[54][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[58][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[62][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[49][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[53][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[57][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[61][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[51][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[55][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[59][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[63][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[40][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[42][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[41][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[43][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[44][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[46][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[45][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[47][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[32][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[34][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[33][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[35][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[36][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[38][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[37][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[39][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[80][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[84][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[88][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[92][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[82][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[86][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[90][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[94][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[81][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[85][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[89][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[93][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[83][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[87][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[91][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[95][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[72][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[74][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[73][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[75][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[76][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[78][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[77][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[79][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[64][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[66][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[65][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[67][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[68][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[70][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[69][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[71][1]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[16][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[20][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[24][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[28][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[18][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[22][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[26][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[30][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[17][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[21][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[25][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[29][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[19][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[23][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[27][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[31][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[8][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[10][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[9][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[11][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[12][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[14][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[13][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[15][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[0][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[2][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[1][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[3][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[4][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[6][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[5][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[7][2]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[48][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[52][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[56][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[60][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[50][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[54][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[58][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[62][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[49][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[53][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[57][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[61][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[51][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[55][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[59][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[63][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[40][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[42][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[41][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[43][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[44][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[46][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[45][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[47][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[32][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[34][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[33][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[35][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[36][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[38][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[37][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[39][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[80][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[84][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[88][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[92][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[82][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[86][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[90][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[94][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[81][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[85][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[89][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[93][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[83][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[87][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[91][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[95][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[72][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[74][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[73][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[75][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[76][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[78][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[77][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[79][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[64][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[66][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[65][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[67][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[68][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[70][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[69][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[71][2]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[16][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[20][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[24][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[28][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[18][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[22][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[26][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[30][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[17][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[21][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[25][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[29][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[19][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[23][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[27][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[31][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[8][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[10][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[9][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[11][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[12][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[14][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[13][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[15][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[0][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[2][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[1][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[3][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[4][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[6][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[5][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[7][3]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[48][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[52][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[56][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[60][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[50][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[54][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[58][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[62][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[49][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[53][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[57][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[61][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[51][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[55][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[59][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[63][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[40][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[42][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[41][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[43][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[44][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[46][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[45][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[47][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[32][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[34][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[33][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[35][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[36][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[38][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[37][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[39][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[80][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[84][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[88][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[92][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[82][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[86][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[90][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[94][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[81][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[85][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[89][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[93][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[83][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[87][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[91][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[95][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[72][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[74][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[73][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[75][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[76][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[78][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[77][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[79][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[64][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[66][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[65][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[67][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[68][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[70][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[69][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[71][3]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[16][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[20][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[24][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[28][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[18][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[22][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[26][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[30][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[17][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[21][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[25][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[29][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[19][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[23][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[27][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[31][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[8][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[10][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[9][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[11][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[12][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[14][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[13][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[15][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[0][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[2][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[1][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[3][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[4][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[6][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[5][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[7][4]            ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[48][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[52][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[56][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[60][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[50][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[54][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[58][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[62][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[49][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[53][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[57][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[61][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[51][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[55][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[59][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[63][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[40][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[42][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[41][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[43][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[44][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[46][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[45][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[47][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[32][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[34][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[33][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[35][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[36][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[38][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[37][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[39][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[80][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[84][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[88][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[92][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[82][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[86][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[90][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[94][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[81][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[85][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[89][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[93][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[83][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[87][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[91][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[95][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[72][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[74][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[73][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[75][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[76][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[78][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[77][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[79][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[64][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[66][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[65][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[67][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[68][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[70][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[69][4]           ; yes                                                              ; yes                                        ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_id0[71][4]           ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][79]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][80]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][47]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][48]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][15]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][16]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][12]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][80]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][81]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][11]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][48]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][49]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][10]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][16]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][17]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][12]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][81]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][82]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][11]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][49]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][50]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][10]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][17]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][18]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][82]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][83]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][50]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][51]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][18]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][19]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][83]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][84]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][51]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][52]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][19]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][20]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][84]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][85]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][52]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][53]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][20]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][21]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][85]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][86]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][53]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][54]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][21]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][22]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][86]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][87]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][54]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][55]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][22]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][23]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][87]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][88]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][55]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][56]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][23]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][24]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][88]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][89]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][56]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][57]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][24]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][25]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][89]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][90]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][57]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][58]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][25]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][26]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][90]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][91]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][58]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][59]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][26]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][27]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][91]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][92]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][59]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][60]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][27]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][28]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][92]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][93]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][60]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][61]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][28]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][29]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][93]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][94]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][61]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][62]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][29]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][30]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][94]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][95]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][62]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][63]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][30]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][31]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][95]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][96]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][63]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][64]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][31]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][32]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][96]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][97]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][64]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][65]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][32]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][33]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][97]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][98]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][65]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][66]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][33]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][34]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][98]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][99]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][66]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][67]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][34]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][35]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][99]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][100]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][67]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][68]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][35]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][36]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][100]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][101]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][68]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][69]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][36]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][37]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][101]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][102]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][69]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][70]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][37]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][38]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][102]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][103]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][70]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][71]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][38]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][39]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][103]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][104]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][71]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][72]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][39]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][40]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][104]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][105]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][72]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][73]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][40]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][41]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][105]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][106]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][73]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][74]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][41]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][42]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][106]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][107]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][74]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][75]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][42]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][43]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][107]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][108]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][75]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][76]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][43]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[1][44]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][108]                                                                                                ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][76]                                                                                                 ; yes                                                              ; yes                                        ;
; sl_int_meta_dco[0][44]                                                                                                 ; yes                                                              ; yes                                        ;
+------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+


+---------------------------------------------------------------------------------------------------------+
; Logic Cells Representing Combinational Loops                                                            ;
+-----------------------------------------------------------------------------------------------------+---+
; Logic Cell Name                                                                                     ;   ;
+-----------------------------------------------------------------------------------------------------+---+
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|x_en_next~0 ;   ;
; Number of logic cells representing combinational loops                                              ; 1 ;
+-----------------------------------------------------------------------------------------------------+---+
Note: All cells listed above may not be present at the end of synthesis due to various synthesis optimizations.


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                                                                                                                                                                                     ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------+
; Register name                                                                                                                                                                                                                 ; Reason for Removal                     ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------+
; AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_data[3][7]                                                                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_data[3][2]                                                                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_data[3][1]                                                                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_data[3][0]                                                                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_data[2][7]                                                                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_data[1][7]                                                                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_data[0][7]                                                                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[15,26,27]                                                                                   ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_channel[0,1,3,4]                                                                                 ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_hit_id[0..4]                                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_hit                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[15,26,27]                                                                                   ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_channel[2..4]                                                                                    ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_hit                                                                                              ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|sl_int_dout[12,15,26]                                                                                   ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX|sl_int_dout[12,15,27]                                                                                   ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX|sl_int_dout[12,15,26,27]                                                                                ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX|sl_int_dout[15,26]                                                                                      ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|sl_int_dout[15,27]                                                                                      ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX|sl_int_dout[15,26,27]                                                                                   ; Stuck at GND due to stuck port data_in ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_word_id[2]                                                                                                                                               ; Stuck at GND due to stuck port data_in ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_TX_fifo_din[30]                                                                                                                                          ; Stuck at GND due to stuck port data_in ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC|sl_int_counter[0,1]                                                                                                                       ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[16..20]                                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_enable[0]                                                                                        ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_baseline_ch[0..4]                                                                                ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_enable[1..31]                                                                                    ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_enable[0]                                                                                        ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_baseline_ch[0..4]                                                                                ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_enable[1..31]                                                                                    ; Lost fanout                            ;
; AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_bwp|dffe12a[12]                                                                                                                       ; Lost fanout                            ;
; AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_brp|dffe12a[12]                                                                                                                       ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_bwp|dffe15a[6] ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_brp|dffe15a[6] ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_bwp|dffe12a[6]                                                                          ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_brp|dffe12a[6]                                                                          ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_bwp|dffe12a[6]                                                                          ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_brp|dffe12a[6]                                                                          ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_hit_id[0..4]                                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[16..20]                                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_filter_ch_rd[0..4]                                                                               ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_filter_ch_rd[0..4]                                                                               ; Stuck at GND due to stuck port data_in ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_error[2]                                                                                                                                                      ; Stuck at GND due to stuck port data_in ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_error[2]                                                                                                                                                 ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[21,22,24,25]                                                                                ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[23..25]                                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|ser_data_5_bits_filter:C_FILTER_SIN|sl_int_add[0]                                                 ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|ser_data_5_bits_filter:C_FILTER_SIN|sl_int_add[0]                                                ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_state.COMPUTE                                                                                    ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_state.COMPARE_HIT                                                                                ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_state.BASELINE_OUT                                                                               ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_state.COMPUTE_OUT                                                                                ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_state.COMPUTE                                                                                    ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_state.COMPARE_HIT                                                                                ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_state.BASELINE_OUT                                                                               ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_state.COMPUTE_OUT                                                                                ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX|sl_int_state.COMPARE_DYNAMIC                                                                            ; Lost fanout                            ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_state.CMD_NOT_ADRRESSED                                                                                                                                       ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ1                                                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ1                                                                                                             ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ2                                                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ2                                                                                                             ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ3                                                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ3                                                                                                             ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ4                                                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ4                                                                                                             ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ5                                                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ5                                                                                                             ; Stuck at GND due to stuck port data_in ;
; Total Number of Removed Registers = 193                                                                                                                                                                                       ;                                        ;
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Removed Registers Triggering Further Register Optimizations                                                                                                                                                                                                                                                 ;
+-----------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------+
; Register name                                                                                                                           ; Reason for Removal        ; Registers Removed due to This Register                                                                                                ;
+-----------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------+
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_channel[4] ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[25] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_channel[3] ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[24] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_channel[1] ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[22] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_channel[0] ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[21] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_hit_id[4]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[20] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_hit_id[3]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[19] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_hit_id[2]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[18] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_hit_id[1]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[17] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_hit_id[0]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX|sl_int_dout[16] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_channel[4] ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[25] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_channel[3] ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[24] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_channel[2] ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[23] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_word_id[2]                                                         ; Stuck at GND              ; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_TX_fifo_din[30]                                                  ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_hit_id[4]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[20] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_hit_id[3]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[19] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_hit_id[2]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[18] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_hit_id[1]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[17] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_hit_id[0]  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX|sl_int_dout[16] ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_error[2]                                                                ; Stuck at GND              ; UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_error[2]                                                         ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ1                  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ1                     ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ2                  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ2                     ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ3                  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ3                     ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ4                  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ4                     ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.WAIT_TEST_SEQ5                  ; Stuck at GND              ; AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_state.TEST_SEQ5                     ;
;                                                                                                                                         ; due to stuck port data_in ;                                                                                                                                       ;
+-----------------------------------------------------------------------------------------------------------------------------------------+---------------------------+---------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                                                           ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                                                                                 ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 3:1                ; 13 bits   ; 26 LEs        ; 0 LEs                ; 26 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_counter[0][6]                      ;
; 3:1                ; 13 bits   ; 26 LEs        ; 0 LEs                ; 26 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|sl_int_counter[1][4]                      ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_cmd_process_error[4]                                                         ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC|sl_int_counter[3]                                        ;
; 3:1                ; 7 bits    ; 14 LEs        ; 7 LEs                ; 7 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER|sl_int_shift[2]     ;
; 3:1                ; 16 bits   ; 32 LEs        ; 0 LEs                ; 32 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters|sl_int_spill_tag[7]                                                           ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_count[3]  ;
; 3:1                ; 6 bits    ; 12 LEs        ; 12 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_tsm_wrout[5]                                   ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_count[0] ;
; 3:1                ; 10 bits   ; 20 LEs        ; 0 LEs                ; 20 LEs                 ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_shift[1] ;
; 3:1                ; 10 bits   ; 20 LEs        ; 0 LEs                ; 20 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|sl_int_shift[2]  ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|sl_int_clk_div[0]                                                                                   ;
; 3:1                ; 7 bits    ; 14 LEs        ; 7 LEs                ; 7 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER|sl_int_shift[3]      ;
; 3:1                ; 15 bits   ; 30 LEs        ; 0 LEs                ; 30 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_hit_mux[2][0]                                  ;
; 3:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_ch_out[0]                                      ;
; 3:1                ; 3 bits    ; 6 LEs         ; 3 LEs                ; 3 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|sl_int_error[1]                                                                                     ;
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL|sl_int_clk_div[0]                                                                                 ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters|sl_int_timeout_div[1]                                                         ;
; 4:1                ; 6 bits    ; 12 LEs        ; 12 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_lg_ch_enable[93]                               ;
; 4:1                ; 186 bits  ; 372 LEs       ; 0 LEs                ; 372 LEs                ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_lg_ch_enable[72]                               ;
; 4:1                ; 16 bits   ; 32 LEs        ; 0 LEs                ; 32 LEs                 ; Yes        ; |AID_AIDA_FEB|sl_int_trig_cnt[12]                                                                                                                          ;
; 3:1                ; 11 bits   ; 22 LEs        ; 0 LEs                ; 22 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_hv_group[6]                                                               ;
; 4:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|sl_int_baseline_ch[4]  ;
; 4:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX|sl_int_baseline_ch[0]  ;
; 4:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX|sl_int_baseline_ch[3]  ;
; 4:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX|sl_int_baseline_ch[3]  ;
; 4:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|sl_int_baseline_ch[4]  ;
; 4:1                ; 5 bits    ; 10 LEs        ; 5 LEs                ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX|sl_int_baseline_ch[2]  ;
; 5:1                ; 4 bits    ; 12 LEs        ; 8 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_cmd_process_error[9]                                                         ;
; 4:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_dpram_addr[8]                                                                ;
; 4:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_dpram_addr[7]                                                           ;
; 5:1                ; 31 bits   ; 93 LEs        ; 0 LEs                ; 93 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|sl_int_enable[19]      ;
; 5:1                ; 31 bits   ; 93 LEs        ; 0 LEs                ; 93 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX|sl_int_enable[5]       ;
; 5:1                ; 31 bits   ; 93 LEs        ; 0 LEs                ; 93 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX|sl_int_enable[8]       ;
; 5:1                ; 31 bits   ; 93 LEs        ; 0 LEs                ; 93 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX|sl_int_enable[10]      ;
; 5:1                ; 31 bits   ; 93 LEs        ; 0 LEs                ; 93 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|sl_int_enable[10]      ;
; 5:1                ; 31 bits   ; 93 LEs        ; 0 LEs                ; 93 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX|sl_int_enable[14]      ;
; 14:1               ; 8 bits    ; 72 LEs        ; 72 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET|sl_int_data[5]                                                             ;
; 5:1                ; 8 bits    ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET|sl_int_data[14]                                                            ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_spi_clk_cnt[0]                             ;
; 5:1                ; 30 bits   ; 90 LEs        ; 0 LEs                ; 90 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|sl_int_filter_ch_rd[3] ;
; 5:1                ; 7 bits    ; 21 LEs        ; 7 LEs                ; 14 LEs                 ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_frame_cnt[4]                                                                 ;
; 5:1                ; 5 bits    ; 15 LEs        ; 10 LEs               ; 5 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_d12[1]                                                                  ;
; 5:1                ; 5 bits    ; 15 LEs        ; 5 LEs                ; 10 LEs                 ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_d12[10]                                                                 ;
; 5:1                ; 2 bits    ; 6 LEs         ; 2 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_d12[5]                                                                  ;
; 5:1                ; 192 bits  ; 576 LEs       ; 0 LEs                ; 576 LEs                ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_latched_hit_id[14][0]                          ;
; 5:1                ; 288 bits  ; 864 LEs       ; 288 LEs              ; 576 LEs                ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_latched_hit_id[85][4]                          ;
; 4:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_int_sc_counter[1]                                                                ;
; 6:1                ; 15 bits   ; 60 LEs        ; 0 LEs                ; 60 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_send_word[16]                              ;
; 6:1                ; 12 bits   ; 48 LEs        ; 0 LEs                ; 48 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_send_word[9]                               ;
; 7:1                ; 7 bits    ; 28 LEs        ; 28 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM|sl_int_data[23]                                                                          ;
; 7:1                ; 15 bits   ; 60 LEs        ; 0 LEs                ; 60 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|sl_int_word[0]                                                                                      ;
; 5:1                ; 3 bits    ; 9 LEs         ; 6 LEs                ; 3 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver|sl_int_counter[0]                             ;
; 7:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_err[3]                                                                    ;
; 7:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_err[0]                                                                    ;
; 9:1                ; 28 bits   ; 168 LEs       ; 140 LEs              ; 28 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|sl_int_fifo_L2_din[8]                                                                       ;
; 9:1                ; 16 bits   ; 96 LEs        ; 96 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM|sl_int_data[10]                                                                          ;
; 9:1                ; 4 bits    ; 24 LEs        ; 4 LEs                ; 20 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_frame_cnt[0]                                                              ;
; 9:1                ; 3 bits    ; 18 LEs        ; 15 LEs               ; 3 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_d16[15]                                                                 ;
; 9:1                ; 6 bits    ; 36 LEs        ; 36 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_d16[3]                                                                  ;
; 9:1                ; 2 bits    ; 12 LEs        ; 12 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_d16[6]                                                                  ;
; 9:1                ; 2 bits    ; 12 LEs        ; 12 LEs               ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|sl_int_d16[13]                                                                 ;
; 10:1               ; 2 bits    ; 12 LEs        ; 4 LEs                ; 8 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|sl_int_tx_cnt[1]                                                                 ;
; 11:1               ; 8 bits    ; 56 LEs        ; 0 LEs                ; 56 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_int_adc_counter[4]                                 ;
; 7:1                ; 20 bits   ; 80 LEs        ; 0 LEs                ; 80 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_latency_cnt[18]                            ;
; 4:1                ; 16 bits   ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; Yes        ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC|sl_int_crc[6]                                            ;
; 4:1                ; 3 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|Mux17                                                                            ;
; 4:1                ; 4 bits    ; 8 LEs         ; 8 LEs                ; 0 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|Mux15                                                                            ;
; 3:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET|sl_next_state                                                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET|sl_next_state.STORE                                                        ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; No         ; |AID_AIDA_FEB|sl_int_dpram_addr_rd[7]                                                                                                                      ;
; 3:1                ; 7 bits    ; 14 LEs        ; 14 LEs               ; 0 LEs                  ; No         ; |AID_AIDA_FEB|sl_int_dpram_addr_rd[2]                                                                                                                      ;
; 3:1                ; 3 bits    ; 6 LEs         ; 6 LEs                ; 0 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX|sl_next_state          ;
; 3:1                ; 10 bits   ; 20 LEs        ; 10 LEs               ; 10 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|sl_next_error                                                                       ;
; 4:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_next_watchdog_cnt                              ;
; 4:1                ; 2 bits    ; 4 LEs         ; 2 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_next_watchdog_cnt                              ;
; 14:1               ; 8 bits    ; 72 LEs        ; 72 LEs               ; 0 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|Mux3                                                                             ;
; 5:1                ; 7 bits    ; 21 LEs        ; 7 LEs                ; 14 LEs                 ; No         ; |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|sl_next_sub_addr                                                                                    ;
; 5:1                ; 2 bits    ; 6 LEs         ; 4 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC|Selector17                                               ;
; 32:1               ; 15 bits   ; 315 LEs       ; 315 LEs              ; 0 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX|Mux2                   ;
; 8:1                ; 4 bits    ; 20 LEs        ; 20 LEs               ; 0 LEs                  ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC|Mux2                                                     ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL|Selector1                                                                                           ;
; 6:1                ; 3 bits    ; 12 LEs        ; 6 LEs                ; 6 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|Selector2                                 ;
; 6:1                ; 3 bits    ; 12 LEs        ; 6 LEs                ; 6 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER|Selector4                                 ;
; 7:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM|Selector8                                                                                ;
; 7:1                ; 4 bits    ; 16 LEs        ; 12 LEs               ; 4 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|Selector2        ;
; 7:1                ; 4 bits    ; 16 LEs        ; 12 LEs               ; 4 LEs                  ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|Selector2       ;
; 7:1                ; 4 bits    ; 16 LEs        ; 12 LEs               ; 4 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL|Selector13                                                                                        ;
; 7:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver|Selector2                                     ;
; 7:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver|Selector0                                     ;
; 8:1                ; 2 bits    ; 10 LEs        ; 4 LEs                ; 6 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|Selector34                                        ;
; 7:1                ; 3 bits    ; 12 LEs        ; 9 LEs                ; 3 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER|Selector4            ;
; 7:1                ; 3 bits    ; 12 LEs        ; 9 LEs                ; 3 LEs                  ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER|Selector1           ;
; 7:1                ; 2 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|Selector2                                                                            ;
; 12:1               ; 4 bits    ; 32 LEs        ; 20 LEs               ; 12 LEs                 ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|Selector3                                         ;
; 11:1               ; 2 bits    ; 14 LEs        ; 6 LEs                ; 8 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|Selector0                                                                                           ;
; 11:1               ; 3 bits    ; 21 LEs        ; 12 LEs               ; 9 LEs                  ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|Selector62                                                                          ;
; 11:1               ; 4 bits    ; 28 LEs        ; 12 LEs               ; 16 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|Selector61                                                                          ;
; 12:1               ; 2 bits    ; 16 LEs        ; 8 LEs                ; 8 LEs                  ; No         ; |AID_AIDA_FEB|AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL|Selector7                                                                                           ;
; 41:1               ; 7 bits    ; 189 LEs       ; 56 LEs               ; 133 LEs                ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER|Selector6                                                                      ;
; 17:1               ; 6 bits    ; 66 LEs        ; 36 LEs               ; 30 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|Selector12                                                                           ;
; 17:1               ; 2 bits    ; 22 LEs        ; 10 LEs               ; 12 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|Selector11                                                                           ;
; 17:1               ; 2 bits    ; 22 LEs        ; 8 LEs                ; 14 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|Selector18                                                                          ;
; 19:1               ; 3 bits    ; 36 LEs        ; 18 LEs               ; 18 LEs                 ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_next_state.ADC_DELAY                               ;
; 18:1               ; 2 bits    ; 24 LEs        ; 10 LEs               ; 14 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|Selector20                                                                          ;
; 20:1               ; 2 bits    ; 26 LEs        ; 8 LEs                ; 18 LEs                 ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_next_state.HOLD_DELAY                              ;
; 21:1               ; 2 bits    ; 28 LEs        ; 10 LEs               ; 18 LEs                 ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM|sl_next_state.RESET_PA                                ;
; 47:1               ; 2 bits    ; 62 LEs        ; 22 LEs               ; 40 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|Selector32                                                                          ;
; 47:1               ; 2 bits    ; 62 LEs        ; 18 LEs               ; 44 LEs                 ; No         ; |AID_AIDA_FEB|UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER|Selector26                                                                          ;
; 8:1                ; 3 bits    ; 15 LEs        ; 6 LEs                ; 9 LEs                  ; No         ; |AID_AIDA_FEB|AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|Selector77                                        ;
; 22:1               ; 4 bits    ; 56 LEs        ; 32 LEs               ; 24 LEs                 ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|Selector9                                                                        ;
; 24:1               ; 2 bits    ; 32 LEs        ; 16 LEs               ; 16 LEs                 ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|Selector1                                                                        ;
; 24:1               ; 2 bits    ; 32 LEs        ; 12 LEs               ; 20 LEs                 ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|Selector12                                                                       ;
; 24:1               ; 2 bits    ; 32 LEs        ; 12 LEs               ; 20 LEs                 ; No         ; |AID_AIDA_FEB|AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|Selector5                                                                        ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------+
; Source assignments for Top-level Entity: |AID_AIDA_FEB                 ;
+------------------------------+-------+------+--------------------------+
; Assignment                   ; Value ; From ; To                       ;
+------------------------------+-------+------+--------------------------+
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][108]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][107]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][106]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][105]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][104]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][103]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][102]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][101]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][100]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][99]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][98]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][97]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][96]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][95]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][94]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][93]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][92]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][91]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][90]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][89]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][88]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][87]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][86]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][85]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][84]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][83]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][82]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][81]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][80]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][79]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][78]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][77]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][76]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][75]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][74]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][73]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][72]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][71]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][70]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][69]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][68]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][67]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][66]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][65]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][64]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][63]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][62]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][61]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][60]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][59]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][58]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][57]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][56]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][55]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][54]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][53]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][52]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][51]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][50]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][49]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][48]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][47]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][46]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][45]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][44]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][43]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][42]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][41]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][40]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][39]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][38]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][37]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][36]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][35]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][34]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][33]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][32]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][31]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][30]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][29]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][28]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][27]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][26]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][25]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][24]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][23]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][22]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][21]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][20]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][19]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][18]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][17]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][16]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][15]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][14]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][13]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][12]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][11]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][10]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][9]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][8]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][7]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][6]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][5]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][4]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][3]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][2]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[1][0]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][108]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][107]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][106]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][105]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][104]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][103]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][102]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][101]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][100]  ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][99]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][98]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][97]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][96]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][95]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][94]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][93]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][92]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][91]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][90]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][89]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][88]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][87]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][86]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][85]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][84]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][83]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][82]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][81]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][80]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][79]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][78]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][77]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][76]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][75]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][74]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][73]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][72]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][71]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][70]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][69]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][68]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][67]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][66]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][65]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][64]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][63]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][62]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][61]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][60]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][59]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][58]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][57]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][56]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][55]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][54]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][53]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][52]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][51]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][50]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][49]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][48]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][47]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][46]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][45]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][44]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][43]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][42]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][41]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][40]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][39]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][38]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][37]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][36]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][35]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][34]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][33]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][32]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][31]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][30]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][29]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][28]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][27]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][26]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][25]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][24]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][23]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][22]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][21]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][20]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][19]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][18]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][17]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][16]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][15]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][14]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][13]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][12]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][11]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][10]   ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][9]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][8]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][7]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][6]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][5]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][4]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][3]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][2]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][1]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_dco[0][0]    ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[1][5] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[1][4] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[1][2] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[1][1] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[1][0] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[0][5] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[0][4] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[0][2] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[0][1] ;
; PRESERVE_REGISTER            ; on    ; -    ; sl_int_meta_clk400[0][0] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[1][5] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[1][4] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[1][2] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[1][1] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[1][0] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[0][5] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[0][4] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[0][2] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[0][1] ;
; MAX_FANOUT                   ; 50    ; -    ; sl_int_meta_clk400[0][0] ;
; IGNORE_LCELL_BUFFERS         ; off   ; -    ; sl_int_clk100            ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; off   ; -    ; sl_int_clk100            ;
; IGNORE_LCELL_BUFFERS         ; off   ; -    ; sl_int_clk400            ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; off   ; -    ; sl_int_clk400            ;
; IGNORE_LCELL_BUFFERS         ; off   ; -    ; sl_int_clk32             ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; off   ; -    ; sl_int_clk32             ;
; IGNORE_LCELL_BUFFERS         ; off   ; -    ; sl_int_adc_initialized   ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; off   ; -    ; sl_int_adc_initialized   ;
; IGNORE_LCELL_BUFFERS         ; off   ; -    ; sl_int_fifo_L0_data_clr  ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; off   ; -    ; sl_int_fifo_L0_data_clr  ;
; IGNORE_LCELL_BUFFERS         ; off   ; -    ; sl_int_global_trig       ;
; REMOVE_REDUNDANT_LOGIC_CELLS ; off   ; -    ; sl_int_global_trig       ;
+------------------------------+-------+------+--------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component ;
+-------------------------+-------------+------+-----------------------------------------------------------------------------------------+
; Assignment              ; Value       ; From ; To                                                                                      ;
+-------------------------+-------------+------+-----------------------------------------------------------------------------------------+
; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; -    ; -                                                                                       ;
; PRESERVE_REGISTER       ; ON          ; -    ; output_cell_L                                                                           ;
; DDIO_OUTPUT_REGISTER    ; LOW         ; -    ; output_cell_L                                                                           ;
; DDIO_OUTPUT_REGISTER    ; HIGH        ; -    ; mux                                                                                     ;
+-------------------------+-------------+------+-----------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component|ddio_out_dri:auto_generated ;
+-----------------------------+---------+------+---------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value   ; From ; To                                                                                                                  ;
+-----------------------------+---------+------+---------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; OFF     ; -    ; -                                                                                                                   ;
; ADV_NETLIST_OPT_ALLOWED     ; DEFAULT ; -    ; -                                                                                                                   ;
+-----------------------------+---------+------+---------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                 ;
+---------------------------------+-------+------+-------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                           ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                            ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                            ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                      ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_d96:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                        ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                ;
; POWER_UP_LEVEL ; HIGH  ; -    ; parity6                                                                                                                                   ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_9nb:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                        ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter8a0                                                                                                                                ;
; POWER_UP_LEVEL ; HIGH  ; -    ; parity9                                                                                                                                   ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|altsyncram_kv61:fifo_ram ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                       ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                        ;
+---------------------------------+--------------------+------+----------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                              ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                               ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                              ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                               ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                 ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp|dffpipe_0v8:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                            ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                             ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                              ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                               ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:ws_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                              ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                               ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                 ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp|dffpipe_1v8:dffpipe16 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                            ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                             ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                    ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                     ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                                                     ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_en6:rdptr_g1p ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                                                 ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; sub_parity6a0                                                                                                                                                                                                      ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity5                                                                                                                                                                                                            ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_b5c:wrptr_g1p ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                                                 ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter8a0                                                                                                                                                                                                         ;
; POWER_UP_LEVEL ; HIGH  ; -    ; parity9                                                                                                                                                                                                            ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|altsyncram_rh91:fifo_ram ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                                                         ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                                                          ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp|dffpipe_fd9:dffpipe12 ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                                                     ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                                                      ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_brp ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                       ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                        ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_bwp ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                       ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                        ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                                                         ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                                                          ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp|dffpipe_gd9:dffpipe16 ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                                                     ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                                                      ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|cntr_qld:cntr_b ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                                     ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter_reg_bit0                                                                                                                                                                                       ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                    ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                     ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                                                     ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_fn6:rdptr_g1p ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                                                 ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                                                         ;
; POWER_UP_LEVEL ; HIGH  ; -    ; parity6                                                                                                                                                                                                            ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_a5c:wrptr_g1p ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                                                 ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; sub_parity9a0                                                                                                                                                                                                      ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                                                            ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|altsyncram_sh91:fifo_ram ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                                                         ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                                                          ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp|dffpipe_hd9:dffpipe12 ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                                                     ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                                                      ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                                                         ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                                                          ;
+-----------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp|dffpipe_id9:dffpipe15 ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                                                     ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                                                      ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|cntr_qld:cntr_b ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                                     ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter_reg_bit0                                                                                                                                                                                       ;
+----------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component|altsyncram_glu3:auto_generated ;
+---------------------------------+--------------------+------+----------------------------------------------+
; Assignment                      ; Value              ; From ; To                                           ;
+---------------------------------+--------------------+------+----------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                            ;
+---------------------------------+--------------------+------+----------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                 ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                  ;
+---------------------------------+--------------------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram|altsyncram_f0s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                              ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                               ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram|altsyncram_f0s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                                              ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                                               ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component ;
+---------------------+-------+------+------------------------------------------------------------------------------------------------------------+
; Assignment          ; Value ; From ; To                                                                                                         ;
+---------------------+-------+------+------------------------------------------------------------------------------------------------------------+
; DDIO_INPUT_REGISTER ; LOW   ; -    ; input_cell_L                                                                                               ;
; DDIO_INPUT_REGISTER ; HIGH  ; -    ; input_cell_H                                                                                               ;
+---------------------+-------+------+------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component|ddio_in_0ai:auto_generated ;
+-----------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value ; From ; To                                                                                                                            ;
+-----------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; OFF   ; -    ; -                                                                                                                             ;
+-----------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM ;
+-------------------+-------+------+----------------------------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                                         ;
+-------------------+-------+------+----------------------------------------------------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[95][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[95][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[95][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[95][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[95][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[94][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[94][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[94][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[94][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[94][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[93][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[93][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[93][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[93][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[93][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[92][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[92][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[92][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[92][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[92][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[91][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[91][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[91][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[91][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[91][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[90][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[90][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[90][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[90][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[90][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[89][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[89][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[89][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[89][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[89][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[88][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[88][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[88][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[88][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[88][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[87][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[87][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[87][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[87][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[87][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[86][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[86][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[86][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[86][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[86][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[85][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[85][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[85][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[85][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[85][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[84][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[84][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[84][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[84][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[84][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[83][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[83][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[83][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[83][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[83][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[82][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[82][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[82][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[82][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[82][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[81][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[81][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[81][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[81][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[81][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[80][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[80][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[80][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[80][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[80][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[79][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[79][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[79][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[79][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[79][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[78][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[78][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[78][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[78][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[78][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[77][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[77][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[77][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[77][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[77][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[76][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[76][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[76][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[76][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[76][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[75][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[75][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[75][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[75][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[75][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[74][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[74][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[74][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[74][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[74][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[73][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[73][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[73][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[73][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[73][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[72][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[72][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[72][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[72][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[72][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[71][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[71][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[71][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[71][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[71][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[70][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[70][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[70][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[70][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[70][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[69][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[69][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[69][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[69][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[69][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[68][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[68][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[68][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[68][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[68][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[67][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[67][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[67][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[67][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[67][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[66][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[66][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[66][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[66][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[66][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[65][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[65][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[65][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[65][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[65][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[64][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[64][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[64][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[64][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[64][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[63][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[63][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[63][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[63][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[63][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[62][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[62][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[62][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[62][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[62][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[61][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[61][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[61][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[61][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[61][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[60][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[60][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[60][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[60][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[60][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[59][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[59][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[59][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[59][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[59][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[58][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[58][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[58][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[58][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[58][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[57][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[57][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[57][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[57][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[57][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[56][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[56][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[56][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[56][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[56][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[55][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[55][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[55][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[55][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[55][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[54][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[54][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[54][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[54][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[54][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[53][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[53][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[53][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[53][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[53][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[52][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[52][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[52][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[52][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[52][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[51][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[51][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[51][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[51][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[51][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[50][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[50][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[50][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[50][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[50][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[49][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[49][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[49][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[49][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[49][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[48][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[48][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[48][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[48][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[48][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[47][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[47][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[47][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[47][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[47][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[46][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[46][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[46][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[46][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[46][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[45][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[45][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[45][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[45][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[45][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[44][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[44][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[44][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[44][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[44][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[43][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[43][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[43][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[43][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[43][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[42][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[42][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[42][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[42][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[42][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[41][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[41][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[41][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[41][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[41][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[40][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[40][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[40][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[40][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[40][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[39][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[39][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[39][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[39][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[39][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[38][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[38][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[38][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[38][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[38][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[37][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[37][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[37][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[37][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[37][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[36][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[36][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[36][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[36][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[36][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[35][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[35][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[35][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[35][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[35][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[34][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[34][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[34][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[34][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[34][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[33][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[33][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[33][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[33][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[33][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[32][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[32][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[32][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[32][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[32][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[31][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[31][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[31][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[31][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[31][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[30][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[30][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[30][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[30][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[30][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[29][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[29][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[29][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[29][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[29][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[28][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[28][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[28][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[28][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[28][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[27][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[27][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[27][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[27][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[27][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[26][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[26][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[26][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[26][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[26][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[25][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[25][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[25][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[25][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[25][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[24][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[24][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[24][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[24][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[24][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[23][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[23][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[23][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[23][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[23][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[22][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[22][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[22][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[22][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[22][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[21][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[21][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[21][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[21][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[21][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[20][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[20][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[20][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[20][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[20][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[19][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[19][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[19][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[19][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[19][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[18][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[18][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[18][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[18][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[18][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[17][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[17][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[17][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[17][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[17][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[16][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[16][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[16][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[16][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[16][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[15][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[15][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[15][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[15][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[15][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[14][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[14][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[14][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[14][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[14][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[13][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[13][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[13][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[13][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[13][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[12][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[12][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[12][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[12][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[12][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[11][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[11][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[11][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[11][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[11][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[10][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[10][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[10][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[10][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[10][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[9][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[9][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[9][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[9][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[9][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[8][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[8][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[8][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[8][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[8][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[7][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[7][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[7][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[7][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[7][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[6][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[6][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[6][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[6][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[6][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[5][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[5][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[5][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[5][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[5][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[4][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[4][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[4][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[4][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[4][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[3][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[3][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[3][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[3][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[3][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[2][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[2][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[2][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[2][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[2][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[1][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[1][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[1][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[1][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[1][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[0][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[0][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[0][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[0][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_hit_id0[0][0]                                                       ;
+-------------------+-------+------+----------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER ;
+-------------------+-------+------+----------------------------------------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                                                     ;
+-------------------+-------+------+----------------------------------------------------------------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; sl_int_clear[1]                                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_clear[0]                                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_start[1]                                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_start[0]                                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset[1][1]                                                                    ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset[1][0]                                                                    ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset[0][1]                                                                    ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset[0][0]                                                                    ;
+-------------------+-------+------+----------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component ;
+-------------------------+-------------+------+-------------------------------------------------------------------------------------------------+
; Assignment              ; Value       ; From ; To                                                                                              ;
+-------------------------+-------------+------+-------------------------------------------------------------------------------------------------+
; ADV_NETLIST_OPT_ALLOWED ; NEVER_ALLOW ; -    ; -                                                                                               ;
; PRESERVE_REGISTER       ; ON          ; -    ; output_cell_L                                                                                   ;
; DDIO_OUTPUT_REGISTER    ; LOW         ; -    ; output_cell_L                                                                                   ;
; DDIO_OUTPUT_REGISTER    ; HIGH        ; -    ; mux                                                                                             ;
+-------------------------+-------------+------+-------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component|ddio_out_dri:auto_generated ;
+-----------------------------+---------+------+-----------------------------------------------------------------------------------------------------------------------------+
; Assignment                  ; Value   ; From ; To                                                                                                                          ;
+-----------------------------+---------+------+-----------------------------------------------------------------------------------------------------------------------------+
; SYNCHRONIZER_IDENTIFICATION ; OFF     ; -    ; -                                                                                                                           ;
; ADV_NETLIST_OPT_ALLOWED     ; DEFAULT ; -    ; -                                                                                                                           ;
+-----------------------------+---------+------+-----------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+---------------------+
; Assignment                      ; Value ; From ; To                  ;
+---------------------------------+-------+------+---------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                   ;
+---------------------------------+-------+------+---------------------+


+-------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated ;
+---------------------------------+-------+------+------------------------------------------------+
; Assignment                      ; Value ; From ; To                                             ;
+---------------------------------+-------+------+------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                              ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                              ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                        ;
+---------------------------------+-------+------+------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_so6:rdptr_g1p ;
+----------------+-------+------+---------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                          ;
+----------------+-------+------+---------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                  ;
; POWER_UP_LEVEL ; HIGH  ; -    ; parity6                                                                                     ;
+----------------+-------+------+---------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_o6c:wrptr_g1p ;
+----------------+-------+------+---------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                          ;
+----------------+-------+------+---------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter8a0                                                                                  ;
; POWER_UP_LEVEL ; HIGH  ; -    ; parity9                                                                                     ;
+----------------+-------+------+---------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|altsyncram_2m91:fifo_ram ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                         ;
+---------------------------------+--------------------+------+------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                          ;
+---------------------------------+--------------------+------+------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:rs_brp ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                 ;
+---------------------------------+-------+------+-------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:rs_bwp ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                 ;
+---------------------------------+-------+------+-------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp ;
+-----------------------+-------+------+-------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                  ;
+-----------------------+-------+------+-------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                   ;
+-----------------------+-------+------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp|dffpipe_se9:dffpipe13 ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                              ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                               ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_brp ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                 ;
+---------------------------------+-------+------+-------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:ws_bwp ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                ;
+---------------------------------+-------+------+-------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                 ;
+---------------------------------+-------+------+-------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp ;
+-----------------------+-------+------+-------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                  ;
+-----------------------+-------+------+-------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                   ;
+-----------------------+-------+------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp|dffpipe_te9:dffpipe16 ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                              ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                               ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------+
; Source assignments for AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL ;
+-------------------+-------+------+------------------------------+
; Assignment        ; Value ; From ; To                           ;
+-------------------+-------+------+------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[607]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[606]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[605]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[604]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[603]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[602]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[601]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[600]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[599]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[598]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[597]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[596]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[595]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[594]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[593]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[592]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[591]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[590]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[589]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[588]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[587]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[586]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[585]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[584]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[583]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[582]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[581]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[580]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[579]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[578]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[577]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[576]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[575]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[574]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[573]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[572]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[571]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[570]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[569]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[568]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[567]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[566]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[565]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[564]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[563]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[562]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[561]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[560]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[559]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[558]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[557]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[556]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[555]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[554]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[553]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[552]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[551]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[550]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[549]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[548]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[547]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[546]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[545]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[544]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[543]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[542]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[541]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[540]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[539]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[538]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[537]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[536]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[535]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[534]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[533]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[532]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[531]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[530]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[529]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[528]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[527]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[526]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[525]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[524]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[523]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[522]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[521]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[520]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[519]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[518]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[517]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[516]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[515]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[514]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[513]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[512]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[511]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[510]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[509]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[508]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[507]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[506]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[505]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[504]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[503]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[502]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[501]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[500]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[499]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[498]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[497]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[496]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[495]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[494]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[493]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[492]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[491]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[490]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[489]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[488]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[487]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[486]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[485]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[484]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[483]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[482]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[481]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[480]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[479]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[478]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[477]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[476]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[475]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[474]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[473]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[472]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[471]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[470]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[469]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[468]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[467]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[466]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[465]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[464]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[463]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[462]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[461]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[460]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[459]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[458]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[457]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[456]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[455]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[454]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[453]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[452]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[451]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[450]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[449]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[448]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[447]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[446]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[445]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[444]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[443]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[442]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[441]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[440]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[439]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[438]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[437]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[436]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[435]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[434]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[433]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[432]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[431]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[430]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[429]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[428]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[427]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[426]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[425]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[424]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[423]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[422]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[421]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[420]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[419]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[418]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[417]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[416]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[415]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[414]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[413]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[412]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[411]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[410]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[409]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[408]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[407]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[406]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[405]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[404]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[403]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[402]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[401]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[400]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[399]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[398]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[397]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[396]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[395]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[394]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[393]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[392]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[391]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[390]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[389]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[388]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[387]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[386]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[385]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[384]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[383]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[382]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[381]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[380]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[379]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[378]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[377]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[376]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[375]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[374]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[373]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[372]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[371]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[370]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[369]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[368]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[367]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[366]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[365]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[364]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[363]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[362]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[361]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[360]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[359]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[358]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[357]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[356]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[355]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[354]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[353]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[352]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[351]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[350]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[349]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[348]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[347]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[346]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[345]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[344]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[343]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[342]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[341]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[340]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[339]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[338]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[337]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[336]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[335]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[334]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[333]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[332]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[331]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[330]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[329]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[328]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[327]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[326]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[325]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[324]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[323]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[322]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[321]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[320]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[319]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[318]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[317]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[316]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[315]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[314]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[313]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[312]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[311]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[310]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[309]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[308]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[307]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[306]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[305]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[304]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[303]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[302]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[301]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[300]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[299]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[298]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[297]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[296]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[295]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[294]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[293]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[292]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[291]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[290]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[289]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[288]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[287]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[286]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[285]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[284]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[283]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[282]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[281]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[280]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[279]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[278]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[277]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[276]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[275]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[274]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[273]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[272]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[271]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[270]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[269]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[268]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[267]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[266]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[265]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[264]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[263]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[262]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[261]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[260]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[259]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[258]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[257]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[256]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[255]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[254]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[253]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[252]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[251]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[250]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[249]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[248]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[247]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[246]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[245]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[244]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[243]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[242]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[241]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[240]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[239]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[238]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[237]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[236]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[235]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[234]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[233]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[232]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[231]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[230]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[229]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[228]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[227]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[226]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[225]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[224]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[223]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[222]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[221]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[220]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[219]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[218]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[217]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[216]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[215]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[214]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[213]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[212]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[211]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[210]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[209]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[208]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[207]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[206]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[205]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[204]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[203]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[202]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[201]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[200]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[199]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[198]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[197]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[196]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[195]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[194]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[193]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[192]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[191]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[190]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[189]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[188]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[187]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[186]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[185]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[184]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[183]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[182]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[181]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[180]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[179]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[178]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[177]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[176]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[175]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[174]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[173]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[172]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[171]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[170]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[169]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[168]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[167]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[166]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[165]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[164]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[163]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[162]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[161]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[160]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[159]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[158]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[157]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[156]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[155]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[154]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[153]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[152]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[151]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[150]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[149]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[148]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[147]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[146]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[145]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[144]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[143]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[142]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[141]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[140]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[139]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[138]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[137]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[136]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[135]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[134]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[133]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[132]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[131]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[130]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[129]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[128]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[127]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[126]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[125]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[124]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[123]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[122]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[121]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[120]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[119]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[118]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[117]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[116]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[115]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[114]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[113]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[112]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[111]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[110]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[109]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[108]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[107]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[106]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[105]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[104]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[103]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[102]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[101]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[100]              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[99]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[98]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[97]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[96]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[95]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[94]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[93]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[92]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[91]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[90]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[89]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[88]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[87]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[86]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[85]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[84]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[83]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[82]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[81]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[80]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[79]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[78]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[77]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[76]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[75]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[74]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[73]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[72]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[71]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[70]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[69]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[68]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[67]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[66]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[65]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[64]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[63]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[62]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[61]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[60]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[59]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[58]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[57]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[56]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[55]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[54]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[53]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[52]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[51]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[50]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[49]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[48]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[47]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[46]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[45]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[44]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[43]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[42]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[41]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[40]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[39]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[38]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[37]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[36]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[35]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[34]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[33]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[32]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[31]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[30]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[29]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[28]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[27]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[26]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[25]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[24]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[23]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[22]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[21]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[20]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[19]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[18]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[17]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[16]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[15]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[14]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10]               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1]                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0]                ;
+-------------------+-------+------+------------------------------+


+------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET ;
+-------------------+-------+------+-------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                    ;
+-------------------+-------+------+-------------------------------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][7]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][6]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][5]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][4]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][3]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][2]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][1]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[13][0]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][7]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][6]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][5]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][4]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][3]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][2]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][1]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[12][0]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][7]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][6]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][5]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][4]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][3]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][2]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][1]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[11][0]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][7]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][6]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][5]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][4]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][3]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][2]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][1]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[10][0]                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[9][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[8][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[7][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[6][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[5][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[4][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[3][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[2][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[1][0]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][7]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][6]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][5]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][4]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][3]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][2]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][1]                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_reg[0][0]                                      ;
+-------------------+-------+------+-------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                             ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                              ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                        ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                         ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                         ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                                   ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_dn6:rdptr_g1p ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                     ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                             ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                                ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_95c:wrptr_g1p ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                     ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                             ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                                ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|altsyncram_8g91:fifo_ram ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                    ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                     ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                             ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                              ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp|dffpipe_ld9:dffpipe10 ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                         ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                          ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_brp ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                           ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                            ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_bwp ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                           ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                            ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                             ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                              ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp|dffpipe_nd9:dffpipe14 ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                         ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                          ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                             ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                              ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                        ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                         ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                         ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                                   ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_dn6:rdptr_g1p ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                     ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                             ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                                ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_95c:wrptr_g1p ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                                     ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                             ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                                ;
+----------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|altsyncram_8g91:fifo_ram ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                    ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                     ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                             ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                              ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp|dffpipe_ld9:dffpipe10 ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                         ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                          ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_brp ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                           ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                            ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_bwp ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                           ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                            ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                             ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                              ;
+-----------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp|dffpipe_nd9:dffpipe14 ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                         ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                          ;
+---------------------------------+-------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram|altsyncram_h0s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                        ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                         ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram|altsyncram_h0s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                        ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                         ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst|altera_pll:altera_pll_i ;
+--------------------------------------+------------------------+-----------------------------------------------------+
; Parameter Name                       ; Value                  ; Type                                                ;
+--------------------------------------+------------------------+-----------------------------------------------------+
; reference_clock_frequency            ; 40.0 MHz               ; String                                              ;
; fractional_vco_multiplier            ; false                  ; String                                              ;
; pll_type                             ; General                ; String                                              ;
; pll_subtype                          ; General                ; String                                              ;
; number_of_clocks                     ; 3                      ; Signed Integer                                      ;
; operation_mode                       ; normal                 ; String                                              ;
; deserialization_factor               ; 4                      ; Signed Integer                                      ;
; data_rate                            ; 0                      ; Signed Integer                                      ;
; sim_additional_refclk_cycles_to_lock ; 0                      ; Signed Integer                                      ;
; output_clock_frequency0              ; 100.000000 MHz         ; String                                              ;
; phase_shift0                         ; 0 ps                   ; String                                              ;
; duty_cycle0                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency1              ; 400.000000 MHz         ; String                                              ;
; phase_shift1                         ; 0 ps                   ; String                                              ;
; duty_cycle1                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency2              ; 32.000000 MHz          ; String                                              ;
; phase_shift2                         ; 0 ps                   ; String                                              ;
; duty_cycle2                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency3              ; 0 MHz                  ; String                                              ;
; phase_shift3                         ; 0 ps                   ; String                                              ;
; duty_cycle3                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency4              ; 0 MHz                  ; String                                              ;
; phase_shift4                         ; 0 ps                   ; String                                              ;
; duty_cycle4                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency5              ; 0 MHz                  ; String                                              ;
; phase_shift5                         ; 0 ps                   ; String                                              ;
; duty_cycle5                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency6              ; 0 MHz                  ; String                                              ;
; phase_shift6                         ; 0 ps                   ; String                                              ;
; duty_cycle6                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency7              ; 0 MHz                  ; String                                              ;
; phase_shift7                         ; 0 ps                   ; String                                              ;
; duty_cycle7                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency8              ; 0 MHz                  ; String                                              ;
; phase_shift8                         ; 0 ps                   ; String                                              ;
; duty_cycle8                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency9              ; 0 MHz                  ; String                                              ;
; phase_shift9                         ; 0 ps                   ; String                                              ;
; duty_cycle9                          ; 50                     ; Signed Integer                                      ;
; output_clock_frequency10             ; 0 MHz                  ; String                                              ;
; phase_shift10                        ; 0 ps                   ; String                                              ;
; duty_cycle10                         ; 50                     ; Signed Integer                                      ;
; output_clock_frequency11             ; 0 MHz                  ; String                                              ;
; phase_shift11                        ; 0 ps                   ; String                                              ;
; duty_cycle11                         ; 50                     ; Signed Integer                                      ;
; output_clock_frequency12             ; 0 MHz                  ; String                                              ;
; phase_shift12                        ; 0 ps                   ; String                                              ;
; duty_cycle12                         ; 50                     ; Signed Integer                                      ;
; output_clock_frequency13             ; 0 MHz                  ; String                                              ;
; phase_shift13                        ; 0 ps                   ; String                                              ;
; duty_cycle13                         ; 50                     ; Signed Integer                                      ;
; output_clock_frequency14             ; 0 MHz                  ; String                                              ;
; phase_shift14                        ; 0 ps                   ; String                                              ;
; duty_cycle14                         ; 50                     ; Signed Integer                                      ;
; output_clock_frequency15             ; 0 MHz                  ; String                                              ;
; phase_shift15                        ; 0 ps                   ; String                                              ;
; duty_cycle15                         ; 50                     ; Signed Integer                                      ;
; output_clock_frequency16             ; 0 MHz                  ; String                                              ;
; phase_shift16                        ; 0 ps                   ; String                                              ;
; duty_cycle16                         ; 50                     ; Signed Integer                                      ;
; output_clock_frequency17             ; 0 MHz                  ; String                                              ;
; phase_shift17                        ; 0 ps                   ; String                                              ;
; duty_cycle17                         ; 50                     ; Signed Integer                                      ;
; clock_name_0                         ;                        ; String                                              ;
; clock_name_1                         ;                        ; String                                              ;
; clock_name_2                         ;                        ; String                                              ;
; clock_name_3                         ;                        ; String                                              ;
; clock_name_4                         ;                        ; String                                              ;
; clock_name_5                         ;                        ; String                                              ;
; clock_name_6                         ;                        ; String                                              ;
; clock_name_7                         ;                        ; String                                              ;
; clock_name_8                         ;                        ; String                                              ;
; clock_name_global_0                  ; false                  ; String                                              ;
; clock_name_global_1                  ; false                  ; String                                              ;
; clock_name_global_2                  ; false                  ; String                                              ;
; clock_name_global_3                  ; false                  ; String                                              ;
; clock_name_global_4                  ; false                  ; String                                              ;
; clock_name_global_5                  ; false                  ; String                                              ;
; clock_name_global_6                  ; false                  ; String                                              ;
; clock_name_global_7                  ; false                  ; String                                              ;
; clock_name_global_8                  ; false                  ; String                                              ;
; m_cnt_hi_div                         ; 1                      ; Signed Integer                                      ;
; m_cnt_lo_div                         ; 1                      ; Signed Integer                                      ;
; m_cnt_bypass_en                      ; false                  ; String                                              ;
; m_cnt_odd_div_duty_en                ; false                  ; String                                              ;
; n_cnt_hi_div                         ; 1                      ; Signed Integer                                      ;
; n_cnt_lo_div                         ; 1                      ; Signed Integer                                      ;
; n_cnt_bypass_en                      ; false                  ; String                                              ;
; n_cnt_odd_div_duty_en                ; false                  ; String                                              ;
; c_cnt_hi_div0                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div0                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en0                     ; false                  ; String                                              ;
; c_cnt_in_src0                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en0               ; false                  ; String                                              ;
; c_cnt_prst0                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst0                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div1                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div1                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en1                     ; false                  ; String                                              ;
; c_cnt_in_src1                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en1               ; false                  ; String                                              ;
; c_cnt_prst1                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst1                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div2                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div2                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en2                     ; false                  ; String                                              ;
; c_cnt_in_src2                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en2               ; false                  ; String                                              ;
; c_cnt_prst2                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst2                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div3                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div3                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en3                     ; false                  ; String                                              ;
; c_cnt_in_src3                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en3               ; false                  ; String                                              ;
; c_cnt_prst3                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst3                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div4                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div4                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en4                     ; false                  ; String                                              ;
; c_cnt_in_src4                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en4               ; false                  ; String                                              ;
; c_cnt_prst4                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst4                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div5                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div5                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en5                     ; false                  ; String                                              ;
; c_cnt_in_src5                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en5               ; false                  ; String                                              ;
; c_cnt_prst5                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst5                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div6                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div6                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en6                     ; false                  ; String                                              ;
; c_cnt_in_src6                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en6               ; false                  ; String                                              ;
; c_cnt_prst6                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst6                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div7                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div7                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en7                     ; false                  ; String                                              ;
; c_cnt_in_src7                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en7               ; false                  ; String                                              ;
; c_cnt_prst7                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst7                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div8                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div8                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en8                     ; false                  ; String                                              ;
; c_cnt_in_src8                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en8               ; false                  ; String                                              ;
; c_cnt_prst8                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst8                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div9                        ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div9                        ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en9                     ; false                  ; String                                              ;
; c_cnt_in_src9                        ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en9               ; false                  ; String                                              ;
; c_cnt_prst9                          ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst9                   ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div10                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div10                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en10                    ; false                  ; String                                              ;
; c_cnt_in_src10                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en10              ; false                  ; String                                              ;
; c_cnt_prst10                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst10                  ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div11                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div11                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en11                    ; false                  ; String                                              ;
; c_cnt_in_src11                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en11              ; false                  ; String                                              ;
; c_cnt_prst11                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst11                  ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div12                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div12                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en12                    ; false                  ; String                                              ;
; c_cnt_in_src12                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en12              ; false                  ; String                                              ;
; c_cnt_prst12                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst12                  ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div13                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div13                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en13                    ; false                  ; String                                              ;
; c_cnt_in_src13                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en13              ; false                  ; String                                              ;
; c_cnt_prst13                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst13                  ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div14                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div14                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en14                    ; false                  ; String                                              ;
; c_cnt_in_src14                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en14              ; false                  ; String                                              ;
; c_cnt_prst14                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst14                  ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div15                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div15                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en15                    ; false                  ; String                                              ;
; c_cnt_in_src15                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en15              ; false                  ; String                                              ;
; c_cnt_prst15                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst15                  ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div16                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div16                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en16                    ; false                  ; String                                              ;
; c_cnt_in_src16                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en16              ; false                  ; String                                              ;
; c_cnt_prst16                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst16                  ; 0                      ; Signed Integer                                      ;
; c_cnt_hi_div17                       ; 1                      ; Signed Integer                                      ;
; c_cnt_lo_div17                       ; 1                      ; Signed Integer                                      ;
; c_cnt_bypass_en17                    ; false                  ; String                                              ;
; c_cnt_in_src17                       ; ph_mux_clk             ; String                                              ;
; c_cnt_odd_div_duty_en17              ; false                  ; String                                              ;
; c_cnt_prst17                         ; 1                      ; Signed Integer                                      ;
; c_cnt_ph_mux_prst17                  ; 0                      ; Signed Integer                                      ;
; pll_vco_div                          ; 1                      ; Signed Integer                                      ;
; pll_slf_rst                          ; false                  ; String                                              ;
; pll_output_clk_frequency             ; 0 MHz                  ; String                                              ;
; pll_cp_current                       ; 0                      ; Signed Integer                                      ;
; pll_bwctrl                           ; 0                      ; Signed Integer                                      ;
; pll_fractional_division              ; 1                      ; Signed Integer                                      ;
; pll_fractional_cout                  ; 24                     ; Signed Integer                                      ;
; pll_dsm_out_sel                      ; 1st_order              ; String                                              ;
; mimic_fbclk_type                     ; gclk                   ; String                                              ;
; pll_fbclk_mux_1                      ; glb                    ; String                                              ;
; pll_fbclk_mux_2                      ; fb_1                   ; String                                              ;
; pll_m_cnt_in_src                     ; ph_mux_clk             ; String                                              ;
; pll_vcoph_div                        ; 1                      ; Signed Integer                                      ;
; refclk1_frequency                    ; 0 MHz                  ; String                                              ;
; pll_clkin_0_src                      ; clk_0                  ; String                                              ;
; pll_clkin_1_src                      ; clk_0                  ; String                                              ;
; pll_clk_loss_sw_en                   ; false                  ; String                                              ;
; pll_auto_clk_sw_en                   ; false                  ; String                                              ;
; pll_manu_clk_sw_en                   ; false                  ; String                                              ;
; pll_clk_sw_dly                       ; 0                      ; Signed Integer                                      ;
; pll_extclk_0_cnt_src                 ; pll_extclk_cnt_src_vss ; String                                              ;
; pll_extclk_1_cnt_src                 ; pll_extclk_cnt_src_vss ; String                                              ;
+--------------------------------------+------------------------+-----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB ;
+-------------------------+-------+-----------------------------------------------+
; Parameter Name          ; Value ; Type                                          ;
+-------------------------+-------+-----------------------------------------------+
; x_reset_active          ; '0'   ; Enumerated                                    ;
; x_nb_config_word16      ; 72    ; Signed Integer                                ;
; x_nb_config_word16_size ; 7     ; Signed Integer                                ;
; x_nb_dpram_size         ; 9     ; Signed Integer                                ;
; x_nb_devices_size       ; 2     ; Signed Integer                                ;
; x_uc_data_size          ; 32    ; Signed Integer                                ;
; x_uc_dma_size_w32       ; 9     ; Signed Integer                                ;
; x_uc_dma_nb_w32         ; 512   ; Signed Integer                                ;
; x_chain_en              ; '0'   ; Enumerated                                    ;
+-------------------------+-------+-----------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB ;
+-------------------+-------+--------------------------------------------------------------------------+
; Parameter Name    ; Value ; Type                                                                     ;
+-------------------+-------+--------------------------------------------------------------------------+
; x_uc_data_size    ; 32    ; Signed Integer                                                           ;
; x_uc_dma_size_w32 ; 9     ; Signed Integer                                                           ;
; x_uc_dma_nb_w32   ; 512   ; Signed Integer                                                           ;
; x_fifo_tx_size    ; 6     ; Signed Integer                                                           ;
; x_reset_active    ; '0'   ; Enumerated                                                               ;
+-------------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component ;
+------------------------+--------------+----------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value        ; Type                                                                                                                 ;
+------------------------+--------------+----------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS      ; ON           ; AUTO_CARRY                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF          ; IGNORE_CARRY                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON           ; AUTO_CASCADE                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF          ; IGNORE_CASCADE                                                                                                       ;
; WIDTH                  ; 1            ; Signed Integer                                                                                                       ;
; POWER_UP_HIGH          ; OFF          ; Untyped                                                                                                              ;
; OE_REG                 ; UNREGISTERED ; Untyped                                                                                                              ;
; extend_oe_disable      ; OFF          ; Untyped                                                                                                              ;
; INTENDED_DEVICE_FAMILY ; Arria V      ; Untyped                                                                                                              ;
; DEVICE_FAMILY          ; Arria V      ; Untyped                                                                                                              ;
; CBXI_PARAMETER         ; ddio_out_dri ; Untyped                                                                                                              ;
+------------------------+--------------+----------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                             ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                          ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                       ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                     ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                     ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                   ;
; LPM_WIDTH               ; 33          ; Signed Integer                                                                                   ;
; LPM_NUMWORDS            ; 64          ; Signed Integer                                                                                   ;
; LPM_WIDTHU              ; 6           ; Signed Integer                                                                                   ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                          ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                          ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                          ;
; USE_EAB                 ; ON          ; Untyped                                                                                          ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                          ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                          ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                          ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                   ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                   ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                          ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                          ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                          ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                          ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                          ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                          ;
; CBXI_PARAMETER          ; dcfifo_cnm1 ; Untyped                                                                                          ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC ;
+-----------------+-------+--------------------------------------------------------------------------------------------------------+
; Parameter Name  ; Value ; Type                                                                                                   ;
+-----------------+-------+--------------------------------------------------------------------------------------------------------+
; x_reset_active  ; '0'   ; Enumerated                                                                                             ;
; x_din_byte_nb   ; 2     ; Signed Integer                                                                                         ;
; x_crc_din_width ; 4     ; Signed Integer                                                                                         ;
; x_crc_width     ; 16    ; Signed Integer                                                                                         ;
+-----------------+-------+--------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER ;
+-------------------------+-------+--------------------------------------------------------------------------+
; Parameter Name          ; Value ; Type                                                                     ;
+-------------------------+-------+--------------------------------------------------------------------------+
; x_reset_active          ; '0'   ; Enumerated                                                               ;
; x_nb_config_word16      ; 72    ; Signed Integer                                                           ;
; x_nb_config_word16_size ; 7     ; Signed Integer                                                           ;
; x_nb_dpram_size         ; 9     ; Signed Integer                                                           ;
; x_nb_devices_size       ; 2     ; Signed Integer                                                           ;
; x_fifo_tx_size          ; 6     ; Signed Integer                                                           ;
+-------------------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER ;
+--------------------+-------+--------------------------------------------------------------------------+
; Parameter Name     ; Value ; Type                                                                     ;
+--------------------+-------+--------------------------------------------------------------------------+
; x_reset_active     ; '0'   ; Enumerated                                                               ;
; x_nb_config_word16 ; 72    ; Signed Integer                                                           ;
; x_nb_dpram_size    ; 9     ; Signed Integer                                                           ;
; x_nb_devices_size  ; 2     ; Signed Integer                                                           ;
; x_chain_en         ; '0'   ; Enumerated                                                               ;
+--------------------+-------+--------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART ;
+------------------+-------------------+------------------------------------------------------------------+
; Parameter Name   ; Value             ; Type                                                             ;
+------------------+-------------------+------------------------------------------------------------------+
; x_reset_active   ; '0'               ; Enumerated                                                       ;
; x_prescaler_size ; 4                 ; Signed Integer                                                   ;
; x_fifo_width     ; 32                ; Signed Integer                                                   ;
; x_fifotx_depth   ; 6                 ; Signed Integer                                                   ;
; x_impl_type      ; WRAPPER_32RX_32TX ; String                                                           ;
+------------------+-------------------+------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1 ;
+------------------+-------+---------------------------------------------------------------------------------------------------------+
; Parameter Name   ; Value ; Type                                                                                                    ;
+------------------+-------+---------------------------------------------------------------------------------------------------------+
; x_reset_active   ; '0'   ; Enumerated                                                                                              ;
; x_prescaler_size ; 4     ; Signed Integer                                                                                          ;
; x_fifo_width     ; 32    ; Signed Integer                                                                                          ;
; x_fifotx_depth   ; 6     ; Signed Integer                                                                                          ;
+------------------+-------+---------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART ;
+------------------+-------+-------------------------------------------------------------------------------------------------------------------------+
; Parameter Name   ; Value ; Type                                                                                                                    ;
+------------------+-------+-------------------------------------------------------------------------------------------------------------------------+
; x_reset_active   ; '0'   ; Enumerated                                                                                                              ;
; x_prescaler_size ; 4     ; Signed Integer                                                                                                          ;
+------------------+-------+-------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN ;
+------------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name   ; Value ; Type                                                                                                                                           ;
+------------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active   ; '0'   ; Enumerated                                                                                                                                     ;
; x_prescaler_size ; 4     ; Signed Integer                                                                                                                                 ;
+------------------+-------+------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                   ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                             ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component ;
+--------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name           ; Value       ; Type                                                                                                                                                                     ;
+--------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; ACF_DISABLE_MLAB_RAM_USE ; FALSE       ; Untyped                                                                                                                                                                  ;
; ADD_RAM_OUTPUT_REGISTER  ; OFF         ; Untyped                                                                                                                                                                  ;
; ADD_USEDW_MSB_BIT        ; OFF         ; Untyped                                                                                                                                                                  ;
; CLOCKS_ARE_SYNCHRONIZED  ; FALSE       ; Untyped                                                                                                                                                                  ;
; DELAY_RDUSEDW            ; 1           ; Untyped                                                                                                                                                                  ;
; DELAY_WRUSEDW            ; 1           ; Untyped                                                                                                                                                                  ;
; LPM_NUMWORDS             ; 64          ; Signed Integer                                                                                                                                                           ;
; LPM_SHOWAHEAD            ; OFF         ; Untyped                                                                                                                                                                  ;
; LPM_WIDTH                ; 32          ; Signed Integer                                                                                                                                                           ;
; LPM_WIDTH_R              ; 8           ; Signed Integer                                                                                                                                                           ;
; LPM_WIDTHU               ; 6           ; Signed Integer                                                                                                                                                           ;
; LPM_WIDTHU_R             ; 8           ; Signed Integer                                                                                                                                                           ;
; MAXIMIZE_SPEED           ; 5           ; Untyped                                                                                                                                                                  ;
; OVERFLOW_CHECKING        ; ON          ; Untyped                                                                                                                                                                  ;
; RAM_BLOCK_TYPE           ; AUTO        ; Untyped                                                                                                                                                                  ;
; RDSYNC_DELAYPIPE         ; 4           ; Signed Integer                                                                                                                                                           ;
; READ_ACLR_SYNCH          ; OFF         ; Untyped                                                                                                                                                                  ;
; UNDERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                                                                  ;
; USE_EAB                  ; ON          ; Untyped                                                                                                                                                                  ;
; WRITE_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                                                                  ;
; WRSYNC_DELAYPIPE         ; 4           ; Signed Integer                                                                                                                                                           ;
; CBXI_PARAMETER           ; dcfifo_cfq1 ; Untyped                                                                                                                                                                  ;
+--------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component ;
+--------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name           ; Value       ; Type                                                                                                                                                                     ;
+--------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; ACF_DISABLE_MLAB_RAM_USE ; FALSE       ; Untyped                                                                                                                                                                  ;
; ADD_RAM_OUTPUT_REGISTER  ; OFF         ; Untyped                                                                                                                                                                  ;
; ADD_USEDW_MSB_BIT        ; OFF         ; Untyped                                                                                                                                                                  ;
; CLOCKS_ARE_SYNCHRONIZED  ; FALSE       ; Untyped                                                                                                                                                                  ;
; DELAY_RDUSEDW            ; 1           ; Untyped                                                                                                                                                                  ;
; DELAY_WRUSEDW            ; 1           ; Untyped                                                                                                                                                                  ;
; LPM_NUMWORDS             ; 256         ; Signed Integer                                                                                                                                                           ;
; LPM_SHOWAHEAD            ; OFF         ; Untyped                                                                                                                                                                  ;
; LPM_WIDTH                ; 8           ; Signed Integer                                                                                                                                                           ;
; LPM_WIDTH_R              ; 32          ; Signed Integer                                                                                                                                                           ;
; LPM_WIDTHU               ; 8           ; Signed Integer                                                                                                                                                           ;
; LPM_WIDTHU_R             ; 6           ; Signed Integer                                                                                                                                                           ;
; MAXIMIZE_SPEED           ; 5           ; Untyped                                                                                                                                                                  ;
; OVERFLOW_CHECKING        ; ON          ; Untyped                                                                                                                                                                  ;
; RAM_BLOCK_TYPE           ; AUTO        ; Untyped                                                                                                                                                                  ;
; RDSYNC_DELAYPIPE         ; 4           ; Signed Integer                                                                                                                                                           ;
; READ_ACLR_SYNCH          ; OFF         ; Untyped                                                                                                                                                                  ;
; UNDERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                                                                  ;
; USE_EAB                  ; ON          ; Untyped                                                                                                                                                                  ;
; WRITE_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                                                                  ;
; WRSYNC_DELAYPIPE         ; 4           ; Signed Integer                                                                                                                                                           ;
; CBXI_PARAMETER           ; dcfifo_enp1 ; Untyped                                                                                                                                                                  ;
+--------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component ;
+------------------------------------+----------------------+---------------------------------------+
; Parameter Name                     ; Value                ; Type                                  ;
+------------------------------------+----------------------+---------------------------------------+
; BYTE_SIZE_BLOCK                    ; 8                    ; Untyped                               ;
; AUTO_CARRY_CHAINS                  ; ON                   ; AUTO_CARRY                            ;
; IGNORE_CARRY_BUFFERS               ; OFF                  ; IGNORE_CARRY                          ;
; AUTO_CASCADE_CHAINS                ; ON                   ; AUTO_CASCADE                          ;
; IGNORE_CASCADE_BUFFERS             ; OFF                  ; IGNORE_CASCADE                        ;
; WIDTH_BYTEENA                      ; 1                    ; Untyped                               ;
; OPERATION_MODE                     ; DUAL_PORT            ; Untyped                               ;
; WIDTH_A                            ; 16                   ; Signed Integer                        ;
; WIDTHAD_A                          ; 9                    ; Signed Integer                        ;
; NUMWORDS_A                         ; 512                  ; Signed Integer                        ;
; OUTDATA_REG_A                      ; UNREGISTERED         ; Untyped                               ;
; ADDRESS_ACLR_A                     ; NONE                 ; Untyped                               ;
; OUTDATA_ACLR_A                     ; NONE                 ; Untyped                               ;
; WRCONTROL_ACLR_A                   ; NONE                 ; Untyped                               ;
; INDATA_ACLR_A                      ; NONE                 ; Untyped                               ;
; BYTEENA_ACLR_A                     ; NONE                 ; Untyped                               ;
; WIDTH_B                            ; 16                   ; Signed Integer                        ;
; WIDTHAD_B                          ; 9                    ; Signed Integer                        ;
; NUMWORDS_B                         ; 512                  ; Signed Integer                        ;
; INDATA_REG_B                       ; CLOCK1               ; Untyped                               ;
; WRCONTROL_WRADDRESS_REG_B          ; CLOCK1               ; Untyped                               ;
; RDCONTROL_REG_B                    ; CLOCK1               ; Untyped                               ;
; ADDRESS_REG_B                      ; CLOCK0               ; Untyped                               ;
; OUTDATA_REG_B                      ; UNREGISTERED         ; Untyped                               ;
; BYTEENA_REG_B                      ; CLOCK1               ; Untyped                               ;
; INDATA_ACLR_B                      ; NONE                 ; Untyped                               ;
; WRCONTROL_ACLR_B                   ; NONE                 ; Untyped                               ;
; ADDRESS_ACLR_B                     ; NONE                 ; Untyped                               ;
; OUTDATA_ACLR_B                     ; NONE                 ; Untyped                               ;
; RDCONTROL_ACLR_B                   ; NONE                 ; Untyped                               ;
; BYTEENA_ACLR_B                     ; NONE                 ; Untyped                               ;
; WIDTH_BYTEENA_A                    ; 1                    ; Signed Integer                        ;
; WIDTH_BYTEENA_B                    ; 1                    ; Signed Integer                        ;
; RAM_BLOCK_TYPE                     ; AUTO                 ; Untyped                               ;
; BYTE_SIZE                          ; 8                    ; Signed Integer                        ;
; READ_DURING_WRITE_MODE_MIXED_PORTS ; DONT_CARE            ; Untyped                               ;
; READ_DURING_WRITE_MODE_PORT_A      ; NEW_DATA_NO_NBE_READ ; Untyped                               ;
; READ_DURING_WRITE_MODE_PORT_B      ; NEW_DATA_NO_NBE_READ ; Untyped                               ;
; INIT_FILE                          ; UNUSED               ; Untyped                               ;
; INIT_FILE_LAYOUT                   ; PORT_A               ; Untyped                               ;
; MAXIMUM_DEPTH                      ; 0                    ; Signed Integer                        ;
; CLOCK_ENABLE_INPUT_A               ; BYPASS               ; Untyped                               ;
; CLOCK_ENABLE_INPUT_B               ; BYPASS               ; Untyped                               ;
; CLOCK_ENABLE_OUTPUT_A              ; NORMAL               ; Untyped                               ;
; CLOCK_ENABLE_OUTPUT_B              ; BYPASS               ; Untyped                               ;
; CLOCK_ENABLE_CORE_A                ; USE_INPUT_CLKEN      ; Untyped                               ;
; CLOCK_ENABLE_CORE_B                ; USE_INPUT_CLKEN      ; Untyped                               ;
; ENABLE_ECC                         ; FALSE                ; Untyped                               ;
; ECC_PIPELINE_STAGE_ENABLED         ; FALSE                ; Untyped                               ;
; WIDTH_ECCSTATUS                    ; 3                    ; Signed Integer                        ;
; DEVICE_FAMILY                      ; Arria V              ; Untyped                               ;
; CBXI_PARAMETER                     ; altsyncram_glu3      ; Untyped                               ;
+------------------------------------+----------------------+---------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER ;
+-------------------+-------+-------------------------------------------------+
; Parameter Name    ; Value ; Type                                            ;
+-------------------+-------+-------------------------------------------------+
; x_reset_active    ; '0'   ; Enumerated                                      ;
; x_nbadcchannel    ; 8     ; Signed Integer                                  ;
; x_asic_channel_nb ; 32    ; Signed Integer                                  ;
+-------------------+-------+-------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM ;
+-------------------+-------+----------------------------------------------------------------------------------+
; Parameter Name    ; Value ; Type                                                                             ;
+-------------------+-------+----------------------------------------------------------------------------------+
; x_reset_active    ; '0'   ; Enumerated                                                                       ;
; x_nbadcchannel    ; 8     ; Signed Integer                                                                   ;
; x_asic_channel_nb ; 32    ; Signed Integer                                                                   ;
+-------------------+-------+----------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                            ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                  ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                  ;
; LPM_NUMWORDS            ; 128         ; Signed Integer                                                                                                                  ;
; LPM_WIDTHU              ; 7           ; Signed Integer                                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_57h1 ; Untyped                                                                                                                         ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:1:C_FIFOX|scfifo:scfifo_component ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                            ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                  ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                  ;
; LPM_NUMWORDS            ; 128         ; Signed Integer                                                                                                                  ;
; LPM_WIDTHU              ; 7           ; Signed Integer                                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_57h1 ; Untyped                                                                                                                         ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:2:C_FIFOX|scfifo:scfifo_component ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                            ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                  ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                  ;
; LPM_NUMWORDS            ; 128         ; Signed Integer                                                                                                                  ;
; LPM_WIDTHU              ; 7           ; Signed Integer                                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_57h1 ; Untyped                                                                                                                         ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:3:C_FIFOX|scfifo:scfifo_component ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                            ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                  ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                  ;
; LPM_NUMWORDS            ; 128         ; Signed Integer                                                                                                                  ;
; LPM_WIDTHU              ; 7           ; Signed Integer                                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_57h1 ; Untyped                                                                                                                         ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:4:C_FIFOX|scfifo:scfifo_component ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                            ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                  ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                  ;
; LPM_NUMWORDS            ; 128         ; Signed Integer                                                                                                                  ;
; LPM_WIDTHU              ; 7           ; Signed Integer                                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_57h1 ; Untyped                                                                                                                         ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:5:C_FIFOX|scfifo:scfifo_component ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                            ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                  ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                  ;
; LPM_NUMWORDS            ; 128         ; Signed Integer                                                                                                                  ;
; LPM_WIDTHU              ; 7           ; Signed Integer                                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_57h1 ; Untyped                                                                                                                         ;
+-------------------------+-------------+---------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                         ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                                   ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                                 ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                                 ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                               ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                               ;
; LPM_NUMWORDS            ; 4           ; Signed Integer                                                                                                                               ;
; LPM_WIDTHU              ; 2           ; Signed Integer                                                                                                                               ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                                      ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                                      ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                                      ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                                      ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                                      ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                                      ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                               ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                                      ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                                      ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                                      ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                                      ;
; CBXI_PARAMETER          ; scfifo_p3h1 ; Untyped                                                                                                                                      ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:7:C_FIFO_OTHERX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                         ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                                   ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                                 ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                                 ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                               ;
; lpm_width               ; 28          ; Signed Integer                                                                                                                               ;
; LPM_NUMWORDS            ; 4           ; Signed Integer                                                                                                                               ;
; LPM_WIDTHU              ; 2           ; Signed Integer                                                                                                                               ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                                      ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                                      ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                                      ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                                                      ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                                      ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                                                      ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                                               ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                                      ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                                      ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                                      ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                                                      ;
; CBXI_PARAMETER          ; scfifo_p3h1 ; Untyped                                                                                                                                      ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC ;
+-------------------+-------+----------------------------------------------------------------------------------+
; Parameter Name    ; Value ; Type                                                                             ;
+-------------------+-------+----------------------------------------------------------------------------------+
; x_reset_active    ; '0'   ; Enumerated                                                                       ;
; x_asic_channel_nb ; 32    ; Signed Integer                                                                   ;
; x_nbadcchannel    ; 8     ; Signed Integer                                                                   ;
+-------------------+-------+----------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component ;
+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value       ; Type                                                                                                                           ;
+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS      ; ON          ; AUTO_CARRY                                                                                                                     ;
; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY                                                                                                                   ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE                                                                                                                   ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE                                                                                                                 ;
; WIDTH                  ; 8           ; Signed Integer                                                                                                                 ;
; POWER_UP_HIGH          ; OFF         ; Untyped                                                                                                                        ;
; INTENDED_DEVICE_FAMILY ; Arria V     ; Untyped                                                                                                                        ;
; INVERT_INPUT_CLOCKS    ; ON          ; Untyped                                                                                                                        ;
; DEVICE_FAMILY          ; Arria V     ; Untyped                                                                                                                        ;
; CBXI_PARAMETER         ; ddio_in_0ai ; Untyped                                                                                                                        ;
+------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                               ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                         ;
; x_nbadcchannel ; 8     ; Signed Integer                                                                                                     ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM ;
+-------------------+-------+---------------------------------------------------------------------------------------------------------+
; Parameter Name    ; Value ; Type                                                                                                    ;
+-------------------+-------+---------------------------------------------------------------------------------------------------------+
; x_reset_active    ; '0'   ; Enumerated                                                                                              ;
; x_asic_channel_nb ; 32    ; Signed Integer                                                                                          ;
+-------------------+-------+---------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                   ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                             ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init ;
+----------------+---------+--------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value   ; Type                                                                                                         ;
+----------------+---------+--------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'     ; Enumerated                                                                                                   ;
; x_adcclk_div   ; 2       ; Signed Integer                                                                                               ;
; x_spiclk_div   ; 2       ; Signed Integer                                                                                               ;
; x_po_latency   ; 1000000 ; Signed Integer                                                                                               ;
; x_wait_latency ; 700     ; Signed Integer                                                                                               ;
; x_test_mode    ; '0'     ; Enumerated                                                                                                   ;
+----------------+---------+--------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK|altddio_out:ALTDDIO_OUT_component ;
+------------------------+--------------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value        ; Type                                                                                                                         ;
+------------------------+--------------+------------------------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS      ; ON           ; AUTO_CARRY                                                                                                                   ;
; IGNORE_CARRY_BUFFERS   ; OFF          ; IGNORE_CARRY                                                                                                                 ;
; AUTO_CASCADE_CHAINS    ; ON           ; AUTO_CASCADE                                                                                                                 ;
; IGNORE_CASCADE_BUFFERS ; OFF          ; IGNORE_CASCADE                                                                                                               ;
; WIDTH                  ; 1            ; Signed Integer                                                                                                               ;
; POWER_UP_HIGH          ; OFF          ; Untyped                                                                                                                      ;
; OE_REG                 ; UNREGISTERED ; Untyped                                                                                                                      ;
; extend_oe_disable      ; OFF          ; Untyped                                                                                                                      ;
; INTENDED_DEVICE_FAMILY ; Arria V      ; Untyped                                                                                                                      ;
; DEVICE_FAMILY          ; Arria V      ; Untyped                                                                                                                      ;
; CBXI_PARAMETER         ; ddio_out_dri ; Untyped                                                                                                                      ;
+------------------------+--------------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM ;
+-------------------+-------+-------------------------------------------------------------------+
; Parameter Name    ; Value ; Type                                                              ;
+-------------------+-------+-------------------------------------------------------------------+
; x_reset_active    ; '0'   ; Enumerated                                                        ;
; x_nbchannel       ; 8     ; Signed Integer                                                    ;
; x_fifo_data_width ; 28    ; Signed Integer                                                    ;
; x_nbeventlimit    ; 01010 ; Unsigned Binary                                                   ;
+-------------------+-------+-------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                        ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                              ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                 ;
+----------------+-------+------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                       ;
+----------------+-------+------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component ;
+-------------------------+-------------+----------------------------------------------------+
; Parameter Name          ; Value       ; Type                                               ;
+-------------------------+-------------+----------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                            ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                         ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                       ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                       ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                     ;
; LPM_WIDTH               ; 33          ; Signed Integer                                     ;
; LPM_NUMWORDS            ; 4096        ; Signed Integer                                     ;
; LPM_WIDTHU              ; 12          ; Signed Integer                                     ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                            ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                            ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                            ;
; USE_EAB                 ; ON          ; Untyped                                            ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                            ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                            ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                            ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                     ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                     ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                            ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                            ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                            ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                            ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                            ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                            ;
; CBXI_PARAMETER          ; dcfifo_qfr1 ; Untyped                                            ;
+-------------------------+-------------+----------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL ;
+--------------------+-------+----------------------------------------------------------+
; Parameter Name     ; Value ; Type                                                     ;
+--------------------+-------+----------------------------------------------------------+
; x_reset_active     ; '0'   ; Enumerated                                               ;
; x_nb_dpram_size    ; 9     ; Signed Integer                                           ;
; x_nb_bits_per_asic ; 1144  ; Signed Integer                                           ;
; x_asic_clk_div     ; 1000  ; Unsigned Binary                                          ;
+--------------------+-------+----------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL ;
+----------------+-------+----------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                           ;
+----------------+-------+----------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                     ;
; x_asic_clk_div ; 1000  ; Unsigned Binary                                                ;
+----------------+-------+----------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL ;
+----------------------+-------+--------------------------------------------------------+
; Parameter Name       ; Value ; Type                                                   ;
+----------------------+-------+--------------------------------------------------------+
; x_reset_active       ; '0'   ; Enumerated                                             ;
; x_nb_dpram_size      ; 9     ; Signed Integer                                         ;
; x_nb_word16          ; 38    ; Signed Integer                                         ;
; x_cs_config_duration ; 3     ; Signed Integer                                         ;
+----------------------+-------+--------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON ;
+------------------------+-------+-------------------------------------------+
; Parameter Name         ; Value ; Type                                      ;
+------------------------+-------+-------------------------------------------+
; x_reset_active         ; '0'   ; Enumerated                                ;
; x_sel_user_get_cmd_cfg ; 0000  ; Unsigned Binary                           ;
+------------------------+-------+-------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET ;
+---------------------+-------+----------------------------------------------------------------------------------+
; Parameter Name      ; Value ; Type                                                                             ;
+---------------------+-------+----------------------------------------------------------------------------------+
; x_reset_active      ; '0'   ; Enumerated                                                                       ;
; x_nb_addr_bits      ; 8     ; Signed Integer                                                                   ;
; x_nb_data_word      ; 14    ; Signed Integer                                                                   ;
; x_user_set_cmd_size ; 16    ; Signed Integer                                                                   ;
+---------------------+-------+----------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET ;
+---------------------+-------+----------------------------------------------------------------------------------+
; Parameter Name      ; Value ; Type                                                                             ;
+---------------------+-------+----------------------------------------------------------------------------------+
; x_reset_active      ; '0'   ; Enumerated                                                                       ;
; x_nb_addr_bits      ; 8     ; Signed Integer                                                                   ;
; x_nb_data_word      ; 14    ; Signed Integer                                                                   ;
; x_user_get_cmd_size ; 4     ; Signed Integer                                                                   ;
+---------------------+-------+----------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY ;
+---------------------+-------+----------------------------------------------------------------------------+
; Parameter Name      ; Value ; Type                                                                       ;
+---------------------+-------+----------------------------------------------------------------------------+
; x_reset_active      ; '0'   ; Enumerated                                                                 ;
; x_user_set_cmd_size ; 16    ; Signed Integer                                                             ;
; x_timeout_cnt_size  ; 13    ; Signed Integer                                                             ;
; x_timeout_cnt_value ; 4798  ; Signed Integer                                                             ;
; x_delay_cnt_size    ; 7     ; Signed Integer                                                             ;
; x_tx_delay_value    ; 8     ; Signed Integer                                                             ;
; x_err_delay_value   ; 94    ; Signed Integer                                                             ;
+---------------------+-------+----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|U_OnePulse:C_BDRATE_PULSE ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART ;
+------------------+--------------------+------------------------------------------------------------+
; Parameter Name   ; Value              ; Type                                                       ;
+------------------+--------------------+------------------------------------------------------------+
; x_reset_active   ; '0'                ; Enumerated                                                 ;
; x_prescaler_size ; 8                  ; Signed Integer                                             ;
; x_fifo_width     ; 8                  ; Signed Integer                                             ;
; x_fifotx_depth   ; 4                  ; Signed Integer                                             ;
; x_impl_type      ; WRAPPER_8TX_8RX_D4 ; String                                                     ;
+------------------+--------------------+------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1 ;
+------------------+-------+--------------------------------------------------------------------------------------------------------+
; Parameter Name   ; Value ; Type                                                                                                   ;
+------------------+-------+--------------------------------------------------------------------------------------------------------+
; x_reset_active   ; '0'   ; Enumerated                                                                                             ;
; x_prescaler_size ; 8     ; Signed Integer                                                                                         ;
; x_fifo_width     ; 8     ; Signed Integer                                                                                         ;
; x_fifotx_depth   ; 4     ; Signed Integer                                                                                         ;
+------------------+-------+--------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART ;
+------------------+-------+------------------------------------------------------------------------------------------------------------------------+
; Parameter Name   ; Value ; Type                                                                                                                   ;
+------------------+-------+------------------------------------------------------------------------------------------------------------------------+
; x_reset_active   ; '0'   ; Enumerated                                                                                                             ;
; x_prescaler_size ; 8     ; Signed Integer                                                                                                         ;
+------------------+-------+------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN ;
+------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name   ; Value ; Type                                                                                                                                          ;
+------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active   ; '0'   ; Enumerated                                                                                                                                    ;
; x_prescaler_size ; 8     ; Signed Integer                                                                                                                                ;
+------------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                        ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                  ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                            ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                          ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                                       ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                                    ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                                  ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                                  ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                                ;
; LPM_WIDTH               ; 8           ; Signed Integer                                                                                                                                ;
; LPM_NUMWORDS            ; 16          ; Signed Integer                                                                                                                                ;
; LPM_WIDTHU              ; 4           ; Signed Integer                                                                                                                                ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                                       ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                                       ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                                       ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                                       ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                                       ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                                       ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                                       ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                                ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                                ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                                       ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                                       ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                                       ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                                       ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                                       ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                                       ;
; CBXI_PARAMETER          ; dcfifo_mdq1 ; Untyped                                                                                                                                       ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                          ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                                       ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                                    ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                                  ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                                  ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                                ;
; LPM_WIDTH               ; 8           ; Signed Integer                                                                                                                                ;
; LPM_NUMWORDS            ; 16          ; Signed Integer                                                                                                                                ;
; LPM_WIDTHU              ; 4           ; Signed Integer                                                                                                                                ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                                       ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                                       ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                                       ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                                       ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                                       ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                                       ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                                       ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                                ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                                ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                                       ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                                       ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                                       ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                                       ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                                       ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                                       ;
; CBXI_PARAMETER          ; dcfifo_mdq1 ; Untyped                                                                                                                                       ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: UFP_USER_SETGET_ACK:C_GET_ACK ;
+----------------+-------+---------------------------------------------------+
; Parameter Name ; Value ; Type                                              ;
+----------------+-------+---------------------------------------------------+
; x_user_nb      ; 1     ; Signed Integer                                    ;
+----------------+-------+---------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER ;
+----------------------+--------+------------------------------------------------+
; Parameter Name       ; Value  ; Type                                           ;
+----------------------+--------+------------------------------------------------+
; x_reset_active       ; '0'    ; Enumerated                                     ;
; x_trig_time_divider  ; 998    ; Signed Integer                                 ;
; x_spill_time_divider ; 999998 ; Signed Integer                                 ;
; x_timeout_prescaler  ; 199999 ; Signed Integer                                 ;
+----------------------+--------+------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters ;
+----------------------+--------+-----------------------------------------------------------------------------+
; Parameter Name       ; Value  ; Type                                                                        ;
+----------------------+--------+-----------------------------------------------------------------------------+
; x_reset_active       ; '0'    ; Enumerated                                                                  ;
; x_trig_time_divider  ; 998    ; Signed Integer                                                              ;
; x_spill_time_divider ; 999998 ; Signed Integer                                                              ;
; x_timeout_prescaler  ; 199999 ; Signed Integer                                                              ;
+----------------------+--------+-----------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters|U_OnePulse:C_pulseSpill ;
+----------------+-------+------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                       ;
+----------------+-------+------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                 ;
+----------------+-------+------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                   ;
+-------------------------+-------------+----------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                             ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                           ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                           ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                         ;
; lpm_width               ; 32          ; Signed Integer                                                                         ;
; LPM_NUMWORDS            ; 256         ; Signed Integer                                                                         ;
; LPM_WIDTHU              ; 8           ; Signed Integer                                                                         ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                         ;
; USE_EAB                 ; ON          ; Untyped                                                                                ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                ;
; CBXI_PARAMETER          ; scfifo_37h1 ; Untyped                                                                                ;
+-------------------------+-------------+----------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                   ;
+-------------------------+-------------+----------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                             ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                           ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                           ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                         ;
; lpm_width               ; 32          ; Signed Integer                                                                         ;
; LPM_NUMWORDS            ; 256         ; Signed Integer                                                                         ;
; LPM_WIDTHU              ; 8           ; Signed Integer                                                                         ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                         ;
; USE_EAB                 ; ON          ; Untyped                                                                                ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                ;
; CBXI_PARAMETER          ; scfifo_37h1 ; Untyped                                                                                ;
+-------------------------+-------------+----------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM ;
+----------------+-------+-------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                    ;
+----------------+-------+-------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                              ;
+----------------+-------+-------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: U_OnePulse:C_GLOBAL_TRIG_PULSE_DCO ;
+----------------+-------+--------------------------------------------------------+
; Parameter Name ; Value ; Type                                                   ;
+----------------+-------+--------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                             ;
+----------------+-------+--------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Partition Dependent Files                                                                                                                            ;
+-----------------------------------------------------------------------------------+--------------------+----------+----------------------------------+
; File                                                                              ; Location           ; Library  ; Checksum                         ;
+-----------------------------------------------------------------------------------+--------------------+----------+----------------------------------+
; ../src/AID_pll3.vhd                                                               ; Project Directory  ; AID_pll3 ; 86a2059d61f6a2d9d9c7bc1405784351 ;
; ../src/AID_pll3/AID_pll3_0002.v                                                   ; Project Directory  ; AID_pll3 ; 7914a114e9f0c303ea68e751042448a6 ;
; libraries/megafunctions/a_dpfifo.inc                                              ; Quartus II Install ; work     ; 37c2d0bb70d5a3f83a4aa09e62c75080 ;
; libraries/megafunctions/a_f2fifo.inc                                              ; Quartus II Install ; work     ; cebe3836bad826c95e765f77477e8a8b ;
; libraries/megafunctions/a_fefifo.inc                                              ; Quartus II Install ; work     ; 05a44f50e786a1d286adceb227096b9f ;
; libraries/megafunctions/a_fffifo.inc                                              ; Quartus II Install ; work     ; aa34dd03c645beef0c31a3e4ef186db4 ;
; libraries/megafunctions/a_gray2bin.inc                                            ; Quartus II Install ; work     ; 7e4b761bbeb1a382a47a02f89c03e13e ;
; libraries/megafunctions/a_graycounter.inc                                         ; Quartus II Install ; work     ; c8eabdd6f8e7d384595a15fec5005aa8 ;
; libraries/megafunctions/a_i2fifo.inc                                              ; Quartus II Install ; work     ; bfe272f05af0cf849bd8b4748efceffe ;
; libraries/megafunctions/a_rdenreg.inc                                             ; Quartus II Install ; work     ; 3fcdce7559590d5a8afbe64788d201fb ;
; libraries/megafunctions/a_regfifo.inc                                             ; Quartus II Install ; work     ; 8b2977668c08752c10a1f1977c9b9ee6 ;
; libraries/megafunctions/aglobal140.inc                                            ; Quartus II Install ; work     ; 8d2bccb28a59085e58b0989ed3cd461a ;
; libraries/megafunctions/alt_sync_fifo.inc                                         ; Quartus II Install ; work     ; a019bef5b10e73079dfab915daa2a6c4 ;
; libraries/megafunctions/altddio_in.tdf                                            ; Quartus II Install ; work     ; 2b75b18249f5d01d341ed364c1d81078 ;
; libraries/megafunctions/altddio_out.tdf                                           ; Quartus II Install ; work     ; 474f339b0f91618925b6ef79a4ea829c ;
; libraries/megafunctions/altdpram.inc                                              ; Quartus II Install ; work     ; 2f9e6727b678ffd76e72bc5a95a26300 ;
; libraries/megafunctions/altera_pll.v                                              ; Quartus II Install ; work     ; e189922ed0503fcbdf413484241763f4 ;
; libraries/megafunctions/altram.inc                                                ; Quartus II Install ; work     ; ad5518b39ffd3cf1df377e6360d1c9b6 ;
; libraries/megafunctions/altrom.inc                                                ; Quartus II Install ; work     ; 192b74eafa8debf2248ea73881e77f91 ;
; libraries/megafunctions/altsyncram.tdf                                            ; Quartus II Install ; work     ; c6eca1d2e539c75023c7051032b10c30 ;
; libraries/megafunctions/altsyncram_fifo.inc                                       ; Quartus II Install ; work     ; 04b2b21790828d0d59a04a16f08af58b ;
; libraries/megafunctions/cyclone_ddio.inc                                          ; Quartus II Install ; work     ; 68c2254f52b458f477f8324afea19b79 ;
; libraries/megafunctions/dcfifo.tdf                                                ; Quartus II Install ; work     ; ebe58908c3df1db772864438eb78c0d9 ;
; libraries/megafunctions/dcfifo_mixed_widths.tdf                                   ; Quartus II Install ; work     ; 460600e052f0e33e51aeaeeba0d01363 ;
; libraries/megafunctions/dffpipe.inc                                               ; Quartus II Install ; work     ; 5471cd80ee441dd293de0ca0963c9aa0 ;
; libraries/megafunctions/lpm_add_sub.inc                                           ; Quartus II Install ; work     ; 144a73b61081a2a03554ff5acc5e8842 ;
; libraries/megafunctions/lpm_compare.inc                                           ; Quartus II Install ; work     ; bbd3e8c93afb7320934629e5fb011566 ;
; libraries/megafunctions/lpm_counter.inc                                           ; Quartus II Install ; work     ; c5cfeeabc5f2ab60b3453f6abbc42b41 ;
; libraries/megafunctions/lpm_decode.inc                                            ; Quartus II Install ; work     ; 10da69a8bbd590d66779e7a142f73790 ;
; libraries/megafunctions/lpm_mux.inc                                               ; Quartus II Install ; work     ; dd87bed90959d6126db09970164b7ba6 ;
; libraries/megafunctions/scfifo.tdf                                                ; Quartus II Install ; work     ; 9f35cf3eb6299035a3d124cc5691dde9 ;
; libraries/megafunctions/stratix_ddio.inc                                          ; Quartus II Install ; work     ; 1407998ba3d6cdd6184249857c9c7e95 ;
; libraries/megafunctions/stratix_lcell.inc                                         ; Quartus II Install ; work     ; 351e0e1cd010436ad5d86b5faf1fa39d ;
; libraries/megafunctions/stratix_ram_block.inc                                     ; Quartus II Install ; work     ; e3a03868917f0b3dd57b6ed1dd195f22 ;
; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO8_D4.vhd            ; Project Directory  ; work     ; 00568f93cc4e2f8601effe439bdcd4bc ;
; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_RX32.vhd           ; Project Directory  ; work     ; 786ae969e800658503c125ef730d2f12 ;
; ../../../lib/ser_serialCommunication/c_aria5/src/SER_UART_FIFO_TX32.vhd           ; Project Directory  ; work     ; 32057915e67b3f885db46c24474dfeee ;
; ../../../lib/ser_serialCommunication/exp/ser_crc_pck.vhd                          ; Project Directory  ; work     ; e16d746e155bdd0d999a153ba2668fcb ;
; ../../../lib/ser_serialCommunication/exp/ser_serialCommunication.vhd              ; Project Directory  ; work     ; 8b49e5806ee783ad1e3777a97f1ce865 ;
; ../../../lib/ser_serialCommunication/src/crc_pol/ser_crc_pol16_DIN16_D4_1a2eb.vhd ; Project Directory  ; work     ; 65981b2b7ff155212d493413e55c0bf7 ;
; ../../../lib/ser_serialCommunication/src/ser_crc.vhd                              ; Project Directory  ; work     ; f39636a71ad8797febf9407c578dd41c ;
; ../../../lib/ser_serialCommunication/src/ser_crc_pck_polynomial.vhd               ; Project Directory  ; work     ; f42855063f0f7f0d8b1837e0093b99be ;
; ../../../lib/ser_serialCommunication/src/ser_data_5_bits_filter.vhd               ; Project Directory  ; work     ; 69eefa988bd6d1deaf9ce25fee479ab6 ;
; ../../../lib/ser_serialCommunication/src/ser_uart.vhd                             ; Project Directory  ; work     ; 5cfa632ca244b1f060fd74879411df3c ;
; ../../../lib/ser_serialCommunication/src/ser_uart_bdgen.vhd                       ; Project Directory  ; work     ; ae3cf90b79415a9e7a5a7aaac60fbb01 ;
; ../../../lib/ser_serialCommunication/src/ser_uart_deser.vhd                       ; Project Directory  ; work     ; d7716234cde25eb1df82e2e0a2f77f25 ;
; ../../../lib/ser_serialCommunication/src/ser_uart_ser.vhd                         ; Project Directory  ; work     ; 207eb48244f49f2387a7a36933eb83ab ;
; ../../../lib/ser_serialCommunication/src/ser_uart_wrapper.vhd                     ; Project Directory  ; work     ; 6b794128925a1d1a789ad4e6e527cae2 ;
; ../../../lib/ser_serialCommunication/src/ser_uart_wrapper32.vhd                   ; Project Directory  ; work     ; 7396e053b3f4c11214598a04d6b92a15 ;
; ../../../lib/ser_serialCommunication/src/ser_uart_wrapper8_d4.vhd                 ; Project Directory  ; work     ; 9efaa1a9f89dfbb7c32e931107492402 ;
; ../../../lib/u_util/exp/u_size.vhd                                                ; Project Directory  ; work     ; 4c13385d4453e2f8b3fea6bada23c6f5 ;
; ../../../lib/u_util/exp/u_util.vhd                                                ; Project Directory  ; work     ; f295c07690c739a2414422a993640294 ;
; ../../../lib/u_util/src/u_onepulse.vhd                                            ; Project Directory  ; work     ; c5d73f86d7dd0a099117b3b01ba6e92a ;
; ../../../lib/UFP_UsbFrontEndProtocol/exp/UFP_fw_version.vhd                       ; Project Directory  ; work     ; 67270c51ef67326bf521fba545af1213 ;
; ../../../lib/UFP_UsbFrontEndProtocol/exp/UFP_UsbFrontEndProtocol.vhd              ; Project Directory  ; work     ; b2ac08bc6d4e232d659918b45cd9a2e3 ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_Decoder.vhd                          ; Project Directory  ; work     ; 12ef4ef0dee7010cdd85751f19bc3468 ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_Encoder_uart.vhd                     ; Project Directory  ; work     ; 1c730a776562e25a58d1bd44b03cab57 ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_USER_GET_CONFIG.vhd                  ; Project Directory  ; work     ; 4f9d187bcd613b22b040682e81500fd9 ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_USER_SET_CONFIG.vhd                  ; Project Directory  ; work     ; ed25f4784ad3a1362896406a90b1819e ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_USER_SETGET_ACK.vhd                  ; Project Directory  ; work     ; 8ddd8ef76d45548c440a3cac1280aa28 ;
; ../../../lib/UFP_UsbFrontEndProtocol/src/UFP_WRAPPER_USB_uart.vhd                 ; Project Directory  ; work     ; 8737697c6fae62d4b05134a5f826d7f4 ;
; ../../../lib/usb_usb/c_aria5/src/USB_L2_TX_FIFO.vhd                               ; Project Directory  ; work     ; 6287b201d2d459d3eb7ae40a80a7032d ;
; ../../../lib/usb_usb/c_aria5/src/USB_UC_PCLK.vhd                                  ; Project Directory  ; work     ; 1cbe54b66ba8ff0446d34f6e76308bcd ;
; ../../../lib/usb_usb/exp/USB_USB.vhd                                              ; Project Directory  ; work     ; ec52aeb96e69021f6ae27c944c1ee79e ;
; ../../../lib/usb_usb/src/USB_USB_Reader.vhd                                       ; Project Directory  ; work     ; 4a0ca7c33e97653e40e4ecfa4f1114ca ;
; db/a_dpfifo_1he1.tdf                                                              ; Project Directory  ; work     ; c680b815efd14ca6fd53049bb1120f3b ;
; db/a_dpfifo_bke1.tdf                                                              ; Project Directory  ; work     ; 09d41abff2cd7df29a61327d542b862d ;
; db/a_dpfifo_dke1.tdf                                                              ; Project Directory  ; work     ; 21ab6dd4f008585f443e77cea4018dc7 ;
; db/a_fefifo_08f.tdf                                                               ; Project Directory  ; work     ; 14d9922b3ce72d89016c48efcbf17db7 ;
; db/a_fefifo_h4f.tdf                                                               ; Project Directory  ; work     ; 4e8d8ce01d83d76c96760e661d686b9b ;
; db/a_fefifo_t7f.tdf                                                               ; Project Directory  ; work     ; 42c03fee91f236863a180a7a26673c33 ;
; db/a_gray2bin_e2b.tdf                                                             ; Project Directory  ; work     ; 411049c85314a4ff7cae8950bed2ff47 ;
; db/a_gray2bin_g2b.tdf                                                             ; Project Directory  ; work     ; 388414a6b8fa707a7aa77dd72ae4c31f ;
; db/a_gray2bin_t3b.tdf                                                             ; Project Directory  ; work     ; 963b8e943007256a65055e0cd39e8d6b ;
; db/a_graycounter_95c.tdf                                                          ; Project Directory  ; work     ; 95cb65303bf28fc49b02ceae85f3474e ;
; db/a_graycounter_9nb.tdf                                                          ; Project Directory  ; work     ; aa5a3295de6b8afd30a31aad4760029b ;
; db/a_graycounter_a5c.tdf                                                          ; Project Directory  ; work     ; 25e1046cb9b4021b0de936f6199153bb ;
; db/a_graycounter_b5c.tdf                                                          ; Project Directory  ; work     ; dbe854f5b6fee94c88c505768be28ffb ;
; db/a_graycounter_d96.tdf                                                          ; Project Directory  ; work     ; bda1fdfa02f5e3ba3ecc8c46339dd73f ;
; db/a_graycounter_dn6.tdf                                                          ; Project Directory  ; work     ; 7e5f10db1ad8cadf0bebc046dc9f945f ;
; db/a_graycounter_en6.tdf                                                          ; Project Directory  ; work     ; 38bacc1a73da79c99e57092e3ca7bbba ;
; db/a_graycounter_fn6.tdf                                                          ; Project Directory  ; work     ; 827a4b9b53cba2bdac79adb8da86f760 ;
; db/a_graycounter_o6c.tdf                                                          ; Project Directory  ; work     ; 63204c1d15a4c64df78491036b53b987 ;
; db/a_graycounter_so6.tdf                                                          ; Project Directory  ; work     ; 5376c6f6778aab06a67fa4c0b2b11f68 ;
; db/alt_synch_pipe_2e8.tdf                                                         ; Project Directory  ; work     ; 48aebb7f365b76da54d674cc9727c7d8 ;
; db/alt_synch_pipe_3e8.tdf                                                         ; Project Directory  ; work     ; e7a2b15de8bba06f87994b0c43b365d4 ;
; db/alt_synch_pipe_6u7.tdf                                                         ; Project Directory  ; work     ; 4c9caebb770b1bf72beeba38361c3ef9 ;
; db/alt_synch_pipe_7u7.tdf                                                         ; Project Directory  ; work     ; 4848630c15d2983ee63ada55aaa1db9e ;
; db/alt_synch_pipe_lc8.tdf                                                         ; Project Directory  ; work     ; c4ebcb3ae04d2167d57c3cb0bcb32ea4 ;
; db/alt_synch_pipe_mc8.tdf                                                         ; Project Directory  ; work     ; 61bf2e632fd07fc9f2d44f9f7a0517e4 ;
; db/alt_synch_pipe_nc8.tdf                                                         ; Project Directory  ; work     ; 2d2f011ac6605b547ab254c8f8ebc38f ;
; db/alt_synch_pipe_oc8.tdf                                                         ; Project Directory  ; work     ; 89549b329ecc95de7e5163ba76a5a379 ;
; db/alt_synch_pipe_pc8.tdf                                                         ; Project Directory  ; work     ; c9687e610f57b3fcf5a4e14027fe71ce ;
; db/alt_synch_pipe_qc8.tdf                                                         ; Project Directory  ; work     ; 7fc8c37af816a0f2b6b004cf4727e519 ;
; db/altsyncram_2m91.tdf                                                            ; Project Directory  ; work     ; 698de3a7bed2b66987a7e1038c3c0383 ;
; db/altsyncram_8g91.tdf                                                            ; Project Directory  ; work     ; eac1ffd5d5eb97b5d8aaadf2a3fe80ad ;
; db/altsyncram_f0s1.tdf                                                            ; Project Directory  ; work     ; f4888affe70eb7962e8f194fb5af81cf ;
; db/altsyncram_glu3.tdf                                                            ; Project Directory  ; work     ; 6fc6235decc8b060d62e7c9d098a7ea5 ;
; db/altsyncram_h0s1.tdf                                                            ; Project Directory  ; work     ; 95551fe169b26357f60002df3fab7e9c ;
; db/altsyncram_kv61.tdf                                                            ; Project Directory  ; work     ; abb92ae9c3ac84a02ea6307abc5b34cf ;
; db/altsyncram_p0s1.tdf                                                            ; Project Directory  ; work     ; b6f99f72a43b0f56875a778d591c587a ;
; db/altsyncram_rh91.tdf                                                            ; Project Directory  ; work     ; 0119c26c4109bf3aec3a3f5d96f176bd ;
; db/altsyncram_sh91.tdf                                                            ; Project Directory  ; work     ; c8d57ecf8cbb8a4218f7434759471313 ;
; db/cmpr_1o5.tdf                                                                   ; Project Directory  ; work     ; 766bd6d46a311492fe07b1368d79d768 ;
; db/cmpr_ep5.tdf                                                                   ; Project Directory  ; work     ; c7c85d7f1358cd8e8b0f08649d36eac1 ;
; db/cmpr_vn5.tdf                                                                   ; Project Directory  ; work     ; 1c1d0aad43c92388401e71e13a1f0d8b ;
; db/cntr_2a7.tdf                                                                   ; Project Directory  ; work     ; c53545464017479f33d6e0d11d916fe9 ;
; db/cntr_3a7.tdf                                                                   ; Project Directory  ; work     ; 3debe44f26df963ffc2e76868a0f82ed ;
; db/cntr_h9b.tdf                                                                   ; Project Directory  ; work     ; 952a8c125150feb5089dd9cc71d092e6 ;
; db/cntr_m9b.tdf                                                                   ; Project Directory  ; work     ; 9031f3a78774fee621056cb28ec6a163 ;
; db/cntr_n9b.tdf                                                                   ; Project Directory  ; work     ; 89cc5d4aedff9297834d7695896cc70c ;
; db/cntr_qld.tdf                                                                   ; Project Directory  ; work     ; 145b6f9d4a244df8db14eb36febc9e32 ;
; db/cntr_t97.tdf                                                                   ; Project Directory  ; work     ; dd59cf1e83362adee96e4c543df0487c ;
; db/dcfifo_cfq1.tdf                                                                ; Project Directory  ; work     ; db9a206a9343d8ec2b5feaf0ff2d9442 ;
; db/dcfifo_cnm1.tdf                                                                ; Project Directory  ; work     ; 81eaf9841e53344673bb3e6590c60efe ;
; db/dcfifo_enp1.tdf                                                                ; Project Directory  ; work     ; 199603b36a2296b6c8c313b45b3b577b ;
; db/dcfifo_mdq1.tdf                                                                ; Project Directory  ; work     ; 0d83151cc087709a2a89d1bc04854f01 ;
; db/dcfifo_qfr1.tdf                                                                ; Project Directory  ; work     ; 4d096a8ef82954929bb8e3151fcb9375 ;
; db/ddio_in_0ai.tdf                                                                ; Project Directory  ; work     ; 8e6303efd04c53a357157da3e111d866 ;
; db/ddio_out_dri.tdf                                                               ; Project Directory  ; work     ; e3879ddff680488a22268db422045a26 ;
; db/dffpipe_0v8.tdf                                                                ; Project Directory  ; work     ; deae9614204b500c0a99aebd54ac56ef ;
; db/dffpipe_1v8.tdf                                                                ; Project Directory  ; work     ; cbf7237e399fe8eb8dff918294df95b8 ;
; db/dffpipe_ed9.tdf                                                                ; Project Directory  ; work     ; c8c3ef363c70372e6e61827b00369f96 ;
; db/dffpipe_fd9.tdf                                                                ; Project Directory  ; work     ; ead62741a07cf67b4dd8c7bae84f0865 ;
; db/dffpipe_gd9.tdf                                                                ; Project Directory  ; work     ; 04c01fd08134d8470b1846b8b6b723ef ;
; db/dffpipe_hd9.tdf                                                                ; Project Directory  ; work     ; 6174275d84f46a365353ba3c6dadb5f1 ;
; db/dffpipe_id9.tdf                                                                ; Project Directory  ; work     ; 694027ba155522b48212e3f461e16eb2 ;
; db/dffpipe_ld9.tdf                                                                ; Project Directory  ; work     ; c915217d88e3c7693ff1cb33d0b6e2b8 ;
; db/dffpipe_md9.tdf                                                                ; Project Directory  ; work     ; fe45f7a652a6953019348b7ee61cbf65 ;
; db/dffpipe_nd9.tdf                                                                ; Project Directory  ; work     ; b78f64df7864496d5b43cb12779d8888 ;
; db/dffpipe_re9.tdf                                                                ; Project Directory  ; work     ; 63446d9443a012e7a7535a203ef7ce6e ;
; db/dffpipe_se9.tdf                                                                ; Project Directory  ; work     ; 8d76106520d1cc283ac7a1483188dd4d ;
; db/dffpipe_te9.tdf                                                                ; Project Directory  ; work     ; 1186f64cfbe293465a6646b0006c126a ;
; db/dffpipe_vu8.tdf                                                                ; Project Directory  ; work     ; 850de27f35f54444b31e2e3a7d9c9b98 ;
; db/dpram_ogb1.tdf                                                                 ; Project Directory  ; work     ; c95e29e9b67cfe5b7476d04550c8c207 ;
; db/dpram_pgb1.tdf                                                                 ; Project Directory  ; work     ; b166ffcef33654d024c9449e2e9557d8 ;
; db/dpram_tgb1.tdf                                                                 ; Project Directory  ; work     ; 1632e16ce396633264ecb9a1c7fe74bc ;
; db/scfifo_37h1.tdf                                                                ; Project Directory  ; work     ; fdb6f8afa94f6b2e4ce3fbf38579266e ;
; db/scfifo_57h1.tdf                                                                ; Project Directory  ; work     ; 98978b26bb422d35cc2496bca4ff781a ;
; db/scfifo_p3h1.tdf                                                                ; Project Directory  ; work     ; ca7f6b0e30401d2338b56e784c1cbc14 ;
; ../src/AID_AIDA.vhd                                                               ; Project Directory  ; work     ; 93b9aefe0aa7d4203ce20a72a899579a ;
; ../src/AID_AIDA_FEB_v2.vhd                                                        ; Project Directory  ; work     ; e7078ebed818b51f91c5fcca599b805a ;
; ../src/AID_AIDA_L0.vhd                                                            ; Project Directory  ; work     ; 7d198f03de31de0adea9779e7ce82060 ;
; ../src/AID_AIDA_L1.vhd                                                            ; Project Directory  ; work     ; 4838f960298093b9046a26c80f87a1e7 ;
; ../src/AID_AIDA_L2.vhd                                                            ; Project Directory  ; work     ; 218e79a7ae5f30b8cc8fec71ea039a43 ;
; ../src/AID_AIDA_L3.vhd                                                            ; Project Directory  ; work     ; 93d213f6a3e7170ce0737a76083dfa0e ;
; ../src/AID_L1_ADC_DDR.vhd                                                         ; Project Directory  ; work     ; ec6d414dcb19ac5991b21fa64df99736 ;
; ../src/AID_L1_ADC_Driver.vhd                                                      ; Project Directory  ; work     ; 515e8fc8f3c6bea402fc5dfce7d04a2e ;
; ../src/AID_L1_ADC_SM.vhd                                                          ; Project Directory  ; work     ; 01ba056a9526e6ac4118d15457059cae ;
; ../src/AID_L1_Counters.vhd                                                        ; Project Directory  ; work     ; 9ff8b18e9263092ef715cc3ec9f4aab7 ;
; ../src/AID_L1_FIFO.vhd                                                            ; Project Directory  ; work     ; 95c9fa251d62ad9ee6a3ae2506d52d05 ;
; ../src/AID_L1_FIFO_OTHER.vhd                                                      ; Project Directory  ; work     ; 7e0659cc16c6175c5f1bb95a7c6589a2 ;
; ../src/AID_L1_HOLD_MANAGER.vhd                                                    ; Project Directory  ; work     ; 947e4491b3438d8ed5a7f6042d863de6 ;
; ../src/AID_L1_SM.vhd                                                              ; Project Directory  ; work     ; a5a6783fa84346c43f367075b6705f67 ;
; ../src/AID_L1_SM_READER.vhd                                                       ; Project Directory  ; work     ; 0a9163d9edc6adea92c630d00b18c1d4 ;
; ../src/AID_L1_Threshold_SM.vhd                                                    ; Project Directory  ; work     ; 76e6d6388bf1358899123029bce81bff ;
; ../src/AID_L2_ADC_INIT.vhd                                                        ; Project Directory  ; work     ; 405ea5b3b457879188d5454133164565 ;
; ../src/AID_L2_AsicProbeControl.vhd                                                ; Project Directory  ; work     ; 2f75330b0f49b5a57a6e927504e72e92 ;
; ../src/AID_L2_AsicSlowControl.vhd                                                 ; Project Directory  ; work     ; ee15c8243a47d99b94ae98a0650c0f5c ;
; ../src/AID_L2_DPRAM.vhd                                                           ; Project Directory  ; work     ; 229f3faad8800272e17561df58ba7535 ;
; ../src/AID_L2_FIFO.vhd                                                            ; Project Directory  ; work     ; ef18c30dee438be28e593917a7cdbe4c ;
; ../src/AID_L2_FpgaSlowControl.vhd                                                 ; Project Directory  ; work     ; e513dd0e378731487d91147362f3ff40 ;
; ../src/AID_L2_HvOnApply.vhd                                                       ; Project Directory  ; work     ; b0f580d853154fc8e0c0d5b795b2063d ;
; ../src/AID_L2_HvOnSlowControl.vhd                                                 ; Project Directory  ; work     ; 97c4b3645dd9f4be820effc9090b741a ;
; ../src/AID_L2i_FIFO.vhd                                                           ; Project Directory  ; work     ; 761e98afc90441c86d9325f23e37e496 ;
; ../src/AID_L3_AC_WRAPPER.vhd                                                      ; Project Directory  ; work     ; fe845fc732cb8e6bab1ad4530ae68bb4 ;
; ../src/AID_L3_SM.vhd                                                              ; Project Directory  ; work     ; ba604a0064dae409662b74192393ef27 ;
; ../src/AID_L3_SM_WRAPPER.vhd                                                      ; Project Directory  ; work     ; 5ffaa19dedbe9c24ba67f596724550ee ;
; ../src/AID_L3_WRAPPER_ADC.vhd                                                     ; Project Directory  ; work     ; 1e0bd493eee2ef3f9be18f63ca7696ca ;
; ../src/AID_L3_WRAPPER_TSM.vhd                                                     ; Project Directory  ; work     ; d526f51273909f7382e5ebd63d52ee98 ;
+-----------------------------------------------------------------------------------+--------------------+----------+----------------------------------+


+-----------------------------------------------------+
; Post-Synthesis Netlist Statistics for Top Partition ;
+---------------------------------------+-------------+
; Type                                  ; Count       ;
+---------------------------------------+-------------+
; arriav_ddio_in                        ; 8           ;
; arriav_ddio_out                       ; 2           ;
; arriav_ff                             ; 5320        ;
;     CLR                               ; 1081        ;
;     CLR SCLR                          ; 282         ;
;     CLR SCLR SLD                      ; 97          ;
;     CLR SLD                           ; 20          ;
;     ENA                               ; 1057        ;
;     ENA CLR                           ; 1447        ;
;     ENA CLR SCLR                      ; 166         ;
;     ENA CLR SCLR SLD                  ; 209         ;
;     ENA CLR SLD                       ; 459         ;
;     plain                             ; 502         ;
; arriav_io_obuf                        ; 35          ;
; arriav_lcell_comb                     ; 3264        ;
;     arith                             ; 592         ;
;         0 data inputs                 ; 2           ;
;         1 data inputs                 ; 531         ;
;         2 data inputs                 ; 59          ;
;     extend                            ; 9           ;
;         7 data inputs                 ; 9           ;
;     normal                            ; 2633        ;
;         0 data inputs                 ; 2           ;
;         1 data inputs                 ; 42          ;
;         2 data inputs                 ; 525         ;
;         3 data inputs                 ; 497         ;
;         4 data inputs                 ; 445         ;
;         5 data inputs                 ; 382         ;
;         6 data inputs                 ; 740         ;
;     shared                            ; 30          ;
;         2 data inputs                 ; 30          ;
; blackbox                              ; 1           ;
;     AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER ; 1           ;
; boundary_port                         ; 241         ;
; generic_pll                           ; 3           ;
; stratixv_ram_block                    ; 402         ;
;                                       ;             ;
; Max LUT depth                         ; 6.00        ;
; Average LUT depth                     ; 1.76        ;
+---------------------------------------+-------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Partition "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER" Resource Utilization by Entity                                                                                                                                                                                                                                                                                                                           ;
+-------------------------------------------------------------------+-------------------+--------------+-------------------+------------+------+--------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; Compilation Hierarchy Node                                        ; LC Combinationals ; LC Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name                                                                                                                                                                                                       ; Library Name ;
+-------------------------------------------------------------------+-------------------+--------------+-------------------+------------+------+--------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
; |AID_AIDA_FEB                                                     ; 9030 (0)          ; 18679 (0)    ; 3072              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB                                                                                                                                                                                                             ; work         ;
;    |AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|                            ; 9030 (2)          ; 18679 (7)    ; 3072              ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER                                                                                                                                                                           ; work         ;
;       |AID_L0_TC_WRAPPER:C_TC_WRAPPER|                            ; 7492 (1960)       ; 17983 (2130) ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER                                                                                                                                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|                  ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (4)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (4)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (4)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (4)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (4)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|                 ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|                  ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 27 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 27 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 4 (4)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|                 ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX                                                                                                     ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component                                                                             ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                  ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                  ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                  ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                      ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                      ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                       ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                       ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                         ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                          ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                               ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                               ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                           ; work         ;
;          |AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|                  ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX                                                                                                      ; work         ;
;             |dcfifo:dcfifo_component|                             ; 26 (0)            ; 63 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component                                                                              ; work         ;
;                |dcfifo_ohv1:auto_generated|                       ; 26 (3)            ; 63 (13)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated                                                   ; work         ;
;                   |a_gray2bin_d2b:rdptr_g_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin                   ; work         ;
;                   |a_gray2bin_d2b:rs_dgwp_gray2bin|               ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rs_dgwp_gray2bin                   ; work         ;
;                   |a_graycounter_85c:wrptr_g1p|                   ; 5 (5)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p                       ; work         ;
;                   |a_graycounter_cn6:rdptr_g1p|                   ; 6 (6)             ; 5 (5)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p                       ; work         ;
;                   |alt_synch_pipe_ic8:rs_dgwp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp                        ; work         ;
;                      |dffpipe_cd9:dffpipe10|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10  ; work         ;
;                   |alt_synch_pipe_jc8:ws_dgrp|                    ; 0 (0)             ; 8 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp                        ; work         ;
;                      |dffpipe_dd9:dffpipe13|                      ; 0 (0)             ; 8 (8)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13  ; work         ;
;                   |cmpr_un5:rdempty_eq_comp|                      ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp                          ; work         ;
;                   |cmpr_un5:wrfull_eq_comp|                       ; 3 (3)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:wrfull_eq_comp                           ; work         ;
;                   |dffpipe_bd9:rs_brp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp                                ; work         ;
;                   |dffpipe_bd9:rs_bwp|                            ; 0 (0)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp                                ; work         ;
;                   |dpram_tm91:fifo_lutram|                        ; 0 (0)             ; 18 (18)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram                            ; work         ;
;          |AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|                       ; 21 (0)            ; 55 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD                                                                                                           ; work         ;
;             |dcfifo:dcfifo_component|                             ; 21 (0)            ; 55 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component                                                                                   ; work         ;
;                |dcfifo_abv1:auto_generated|                       ; 21 (6)            ; 55 (10)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated                                                        ; work         ;
;                   |a_gray2bin_c2b:rdptr_g_gray2bin|               ; 2 (2)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_gray2bin_c2b:rdptr_g_gray2bin                        ; work         ;
;                   |a_gray2bin_c2b:rs_dgwp_gray2bin|               ; 2 (2)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_gray2bin_c2b:rs_dgwp_gray2bin                        ; work         ;
;                   |a_graycounter_75c:wrptr_g1p|                   ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_75c:wrptr_g1p                            ; work         ;
;                   |a_graycounter_bn6:rdptr_g1p|                   ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_bn6:rdptr_g1p                            ; work         ;
;                   |alt_synch_pipe_hc8:rs_dgwp|                    ; 0 (0)             ; 6 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp                             ; work         ;
;                      |dffpipe_jd9:dffpipe10|                      ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp|dffpipe_jd9:dffpipe10       ; work         ;
;                   |alt_synch_pipe_kc8:ws_dgrp|                    ; 0 (0)             ; 6 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp                             ; work         ;
;                      |dffpipe_kd9:dffpipe13|                      ; 0 (0)             ; 6 (6)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp|dffpipe_kd9:dffpipe13       ; work         ;
;                   |cmpr_tn5:rdempty_eq_comp|                      ; 2 (2)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|cmpr_tn5:rdempty_eq_comp                               ; work         ;
;                   |cmpr_tn5:wrfull_eq_comp|                       ; 1 (1)             ; 0 (0)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|cmpr_tn5:wrfull_eq_comp                                ; work         ;
;                   |dffpipe_ad9:rs_brp|                            ; 0 (0)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_brp                                     ; work         ;
;                   |dffpipe_ad9:rs_bwp|                            ; 0 (0)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_bwp                                     ; work         ;
;                   |dpram_mm91:fifo_lutram|                        ; 0 (0)             ; 21 (21)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dpram_mm91:fifo_lutram                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:10:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:10:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:10:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:11:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:11:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:11:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:12:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:12:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:12:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:13:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:13:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:13:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:14:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:14:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:14:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:15:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:15:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:15:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:16:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:16:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:16:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:17:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:17:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:17:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:18:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:18:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:18:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:19:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:19:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:19:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:1:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:1:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:1:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:20:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:20:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:20:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:21:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:21:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:21:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:22:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:22:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:22:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:23:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:23:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:23:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:24:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:24:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:24:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:25:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:25:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:25:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:26:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:26:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:26:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:27:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:27:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:27:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:28:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:28:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:28:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:29:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:29:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:29:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:2:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:2:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:2:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:30:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:30:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:30:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:31:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:31:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:31:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:32:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:32:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:32:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:33:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:33:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:33:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:34:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:34:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:34:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:35:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:35:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:35:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:36:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:36:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:36:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:37:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:37:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:37:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:38:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:38:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:38:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:39:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:39:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:39:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:3:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:3:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:3:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:40:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:40:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:40:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:41:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:41:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:41:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:42:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:42:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:42:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:43:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:43:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:43:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:44:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:44:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:44:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:45:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:45:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:45:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:46:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:46:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:46:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:47:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:47:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:47:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:48:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:48:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:48:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:49:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:49:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:49:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:4:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:4:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:4:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:50:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:50:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:50:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:51:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:51:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:51:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:52:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:52:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:52:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:53:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:53:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:53:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:54:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:54:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:54:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:55:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:55:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:55:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:56:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:56:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:56:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:57:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:57:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:57:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:58:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:58:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:58:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:59:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:59:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:59:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:5:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:5:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:5:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:60:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:60:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:60:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:61:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:61:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:61:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:62:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:62:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:62:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:63:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:63:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:63:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:64:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:64:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:64:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:65:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:65:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:65:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:66:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:66:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:66:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:67:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:67:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:67:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:68:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:68:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:68:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:69:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:69:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:69:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:6:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:6:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:6:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:70:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:70:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:70:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:71:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:71:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:71:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:72:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:72:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:72:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:73:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:73:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:73:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:74:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:74:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:74:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:75:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:75:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:75:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:76:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:76:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:76:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:77:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:77:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:77:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:78:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:78:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:78:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:79:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:79:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:79:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:7:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:7:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:7:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:80:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:80:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:80:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:81:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:81:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:81:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:82:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:82:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:82:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:83:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:83:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:83:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:84:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:84:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:84:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:85:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:85:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:85:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:86:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:86:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:86:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:87:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:87:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:87:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:88:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:88:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:88:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:89:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:89:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:89:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:8:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:8:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:8:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:90:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:90:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:90:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:91:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:91:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:91:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:92:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:92:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:92:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:93:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:93:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:93:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:94:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:94:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:94:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:95:C_TRIG_DELAY_SRX| ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:95:C_TRIG_DELAY_SRX                                                                                     ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:95:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                 ; work         ;
;          |AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:9:C_TRIG_DELAY_SRX|  ; 0 (0)             ; 64 (0)       ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:9:C_TRIG_DELAY_SRX                                                                                      ; work         ;
;             |lpm_shiftreg:LPM_SHIFTREG_component|                 ; 0 (0)             ; 64 (64)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:9:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component                                                  ; work         ;
;          |AID_L0_TrigCounters:C_TC|                               ; 3003 (2522)       ; 3606 (3028)  ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC                                                                                                                   ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX|          ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX                                                                        ; work         ;
;             |U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX|           ; 4 (4)             ; 4 (4)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX                                                                         ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:0:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:0:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:10:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:10:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:11:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:11:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:12:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:12:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:13:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:13:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:14:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:14:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:15:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:15:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:16:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:16:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:17:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:17:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:18:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:18:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:19:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:19:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:1:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:1:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:20:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:20:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:21:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:21:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:22:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:22:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:23:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:23:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:24:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:24:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:25:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:25:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:26:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:26:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:27:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:27:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:28:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:28:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:29:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:29:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:2:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:2:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:30:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:30:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:31:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:31:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:32:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:32:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:33:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:33:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:34:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:34:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:35:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:35:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:36:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:36:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:37:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:37:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:38:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:38:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:39:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:39:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:3:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:3:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:40:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:40:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:41:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:41:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:42:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:42:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:43:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:43:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:44:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:44:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:45:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:45:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:46:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:46:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:47:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:47:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:48:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:48:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:49:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:49:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:4:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:4:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:50:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:50:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:51:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:51:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:52:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:52:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:53:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:53:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:54:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:54:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:55:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:55:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:56:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:56:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:57:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:57:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:58:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:58:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:59:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:59:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:5:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:5:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:60:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:60:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:61:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:61:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:62:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:62:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:63:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:63:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:64:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:64:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:65:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:65:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:66:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:66:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:67:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:67:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:68:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:68:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:69:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:69:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:6:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:6:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:70:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:70:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:71:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:71:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:72:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:72:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:73:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:73:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:74:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:74:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:75:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:75:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:76:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:76:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:77:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:77:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:78:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:78:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:79:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:79:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:7:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:7:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:80:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:80:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:81:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:81:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:82:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:82:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:83:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:83:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:84:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:84:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:85:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:85:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:86:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:86:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:87:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:87:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:88:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:88:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:89:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:89:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:8:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:8:C_GTRIG_PULSEX                                                                        ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:90:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:90:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:91:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:91:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:92:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:92:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:93:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:93:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:94:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:94:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:95:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:95:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:96:C_GTRIG_PULSEX|         ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:96:C_GTRIG_PULSEX                                                                       ; work         ;
;             |U_OnePulse:\C_GTRIG_PULSE:9:C_GTRIG_PULSEX|          ; 1 (1)             ; 2 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:9:C_GTRIG_PULSEX                                                                        ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|           ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (0)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 9 (6)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|          ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX                                                                                                                          ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                  ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                       ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (1)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                  ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 8 (5)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                          ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw     ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                            ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                  ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                               ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1   ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|          ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX                                                                                                                          ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                  ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                       ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (0)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                  ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 9 (6)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                          ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw     ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                            ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                  ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                               ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1   ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|           ; 15 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 15 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 15 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 14 (1)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 7 (4)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|           ; 15 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 15 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 15 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 14 (1)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 7 (4)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|           ; 15 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 15 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 15 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 14 (1)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 7 (4)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|           ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (0)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 9 (6)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|           ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (0)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 9 (6)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|           ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (0)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 9 (6)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|           ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (0)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 9 (6)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|           ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (0)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 9 (6)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|           ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX                                                                                                                           ; work         ;
;          |scfifo:scfifo_component|                                ; 16 (0)            ; 12 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component                                                                                                   ; work         ;
;             |scfifo_q3h1:auto_generated|                          ; 16 (1)            ; 12 (1)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated                                                                        ; work         ;
;                |a_dpfifo_2he1:dpfifo|                             ; 15 (1)            ; 11 (0)       ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo                                                   ; work         ;
;                   |a_fefifo_m4f:fifo_state|                       ; 8 (5)             ; 5 (2)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state                           ; work         ;
;                      |cntr_u97:count_usedw|                       ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw      ; work         ;
;                   |cntr_i9b:rd_ptr_count|                         ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count                             ; work         ;
;                   |cntr_i9b:wr_ptr|                               ; 3 (3)             ; 3 (3)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:wr_ptr                                   ; work         ;
;                   |dpram_kgb1:FIFOram|                            ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram                                ; work         ;
;                      |altsyncram_70s1:altsyncram1|                ; 0 (0)             ; 0 (0)        ; 256               ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1    ; work         ;
;       |AID_L1_SM:C_L1_SM|                                         ; 196 (140)         ; 57 (45)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM                                                                                                                                                         ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER                                                                                                                         ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER                                                                                                                          ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:10:C_RX|                ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:10:C_RX                                                                                                                 ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:7:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:7:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:8:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:8:C_RX                                                                                                                  ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:9:C_RX|                 ; 3 (3)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:9:C_RX                                                                                                                  ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|                    ; 94 (47)           ; 39 (31)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|                   ; 96 (49)           ; 41 (33)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX                                                                                                                                   ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                   ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                            ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|                   ; 97 (50)           ; 42 (34)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX                                                                                                                                   ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                   ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                            ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                            ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|                    ; 96 (48)           ; 40 (32)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|                    ; 96 (48)           ; 40 (32)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|                    ; 97 (49)           ; 41 (33)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|                    ; 95 (48)           ; 40 (32)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|                    ; 96 (49)           ; 41 (33)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|                    ; 96 (49)           ; 41 (33)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|                    ; 97 (50)           ; 42 (34)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|                    ; 95 (48)           ; 40 (32)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
;       |AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|                    ; 96 (49)           ; 41 (33)      ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX                                                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_FIRST_READER|                        ; 9 (9)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER                                                                                                    ; work         ;
;          |AID_L1_SM_READER:C_LAST_READER|                         ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER                                                                                                     ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:1:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:2:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:3:C_RX|                 ; 7 (7)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:4:C_RX|                 ; 4 (4)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:5:C_RX|                 ; 6 (6)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX                                                                                             ; work         ;
;          |AID_L1_SM_READER:\C_GEN_READERX:6:C_RX|                 ; 5 (5)             ; 1 (1)        ; 0                 ; 0          ; 0    ; 0            ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX                                                                                             ; work         ;
+-------------------------------------------------------------------+-------------------+--------------+-------------------+------------+------+--------------+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+--------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                  ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                         ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                         ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                         ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                         ;
+---------------------------+----------------------+---------------------------+---------------------+---------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


Encoding Type:  One-Hot
+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; State Machine - |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX|sl_int_state ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; Name                      ; sl_int_state.FALLING ; sl_int_state.WAIT_FALLING ; sl_int_state.RISING ; sl_int_state.WAIT_RISING                                                   ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+
; sl_int_state.WAIT_RISING  ; 0                    ; 0                         ; 0                   ; 0                                                                          ;
; sl_int_state.RISING       ; 0                    ; 0                         ; 1                   ; 1                                                                          ;
; sl_int_state.WAIT_FALLING ; 0                    ; 1                         ; 0                   ; 1                                                                          ;
; sl_int_state.FALLING      ; 1                    ; 0                         ; 0                   ; 1                                                                          ;
+---------------------------+----------------------+---------------------------+---------------------+----------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by Synthesis                                                                                                                                                                                                       ;
+------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; Register Name                                                                                                          ; Protected by Synthesis Attribute or Preserve Register Assignment ; Not to be Touched by Netlist Optimizations ;
+------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|sl_int_fifo_L0_error_clr400[1]                                                       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|sl_int_fifo_L0h_error100[1]                                                          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|sl_int_fifo_L0c_error100[1]                                                          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|sl_int_fifo_L0_error_clr400[0]                                                       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|sl_int_fifo_L0h_error100[0]                                                          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|sl_int_fifo_L0c_error100[0]                                                          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[0]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[1]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[2]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[3]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[4]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[5]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[6]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[7]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[8]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[9]          ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[10]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[11]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[12]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[13]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[14]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[15]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[16]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[17]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[18]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[19]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[20]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[21]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[22]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[23]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[24]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[25]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[26]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[27]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[28]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[29]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[30]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[31]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[32]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[33]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[34]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[35]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[36]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[37]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[38]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[39]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[40]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[41]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[42]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[43]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[44]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[45]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[46]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[47]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[48]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[49]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[50]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[51]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[52]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[53]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[54]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[55]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[56]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[57]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[58]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[59]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[60]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[61]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[62]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[63]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[64]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[65]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[66]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[67]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[68]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[69]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[70]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[71]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[72]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[73]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[74]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[75]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[76]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[77]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[78]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[79]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[80]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[81]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[82]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[83]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[84]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[85]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[86]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[87]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[88]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[89]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[90]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[91]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[92]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[93]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[94]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0h_error[95]         ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[8]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[9]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[10]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[11]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[12]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[13]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[14]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[15]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[96]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][0]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][0]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][1]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][1]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][2]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][2]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][3]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][3]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][4]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][4]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][5]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][5]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][6]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][6]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][7]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][7]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][8]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][8]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][9]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][9]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][10]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][10]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][11]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][11]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][12]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][12]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][13]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][13]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][14]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][14]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][15]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][15]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][16]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][16]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][17]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][17]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][18]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][18]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][19]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][19]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][20]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][20]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][21]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][21]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][22]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][22]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][23]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][23]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][24]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][24]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][25]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][25]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][26]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][26]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][27]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][27]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][28]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][28]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][29]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][29]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][30]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][30]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][31]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][31]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][32]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][32]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][33]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][33]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][34]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][34]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][35]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][35]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][36]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][36]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][37]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][37]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][38]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][38]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][39]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][39]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][40]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][40]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][41]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][41]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][42]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][42]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][43]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][43]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][44]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][44]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][45]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][45]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][46]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][46]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][47]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][47]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][48]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][48]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][49]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][49]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][50]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][50]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][51]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][51]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][52]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][52]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][53]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][53]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][54]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][54]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][55]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][55]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][56]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][56]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][57]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][57]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][58]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][58]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][59]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][59]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][60]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][60]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][61]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][61]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][62]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][62]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][63]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][63]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][64]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][64]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][65]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][65]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][66]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][66]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][67]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][67]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][68]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][68]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][69]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][69]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][70]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][70]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][71]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][71]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][72]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][72]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][73]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][73]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][74]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][74]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][75]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][75]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][76]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][76]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][77]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][77]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][78]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][78]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][79]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][79]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][80]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][80]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][81]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][81]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][82]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][82]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][83]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][83]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][84]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][84]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][85]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][85]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][86]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][86]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][87]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][87]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][88]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][88]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][89]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][89]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][90]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][90]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][91]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][91]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][92]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][92]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][93]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][93]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][94]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][94]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][95]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][95]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][96]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[1][96]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[0][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[1][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[2][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[3][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[4][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[5][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[6][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[7][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[8][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[9][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[10][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[11][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[12][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[13][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[14][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[15][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[16][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[17][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[18][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[19][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[20][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[21][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[22][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[23][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[24][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[25][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[26][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[27][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[28][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[29][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[30][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[31][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[32][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[33][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[34][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[35][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[36][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[37][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[38][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[39][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[40][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[41][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[42][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[43][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[44][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[45][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[46][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[47][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[48][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[49][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[50][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[51][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[52][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[53][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[54][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[55][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[56][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[57][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[58][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[59][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[60][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[61][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[62][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[63][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[64][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[65][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[66][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[67][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[68][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[69][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[70][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[71][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[72][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[73][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[74][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[75][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[76][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[77][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[78][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[79][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[80][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[81][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[82][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[83][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[84][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[85][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[86][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[87][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[88][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[89][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[90][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[91][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[92][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[93][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[94][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[95][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[88]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[89]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[90]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[91]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[92]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[93]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[94]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[95]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[56]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[57]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[58]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[59]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[60]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[61]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[62]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[63]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[80]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[81]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[82]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[83]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[84]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[85]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[86]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[87]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[72]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[73]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[74]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[75]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[76]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[77]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[78]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[79]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[48]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[49]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[50]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[51]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[52]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[53]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[54]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[55]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[40]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[41]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[42]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[43]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[44]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[45]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[46]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[47]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[64]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[65]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[66]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[67]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[68]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[69]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[70]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[71]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[32]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[33]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[34]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[35]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[36]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[37]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[38]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[39]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[0]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[7]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[6]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[5]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[4]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[3]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[2]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[1]                            ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][0]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][0]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][0]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][1]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][1]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][1]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][2]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][2]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][2]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][3]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][3]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][3]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][4]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][4]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][4]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][5]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][5]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][5]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][6]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][6]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][6]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][7]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][7]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][7]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][8]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][8]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][8]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][9]        ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][9]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][9]                                ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][10]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][10]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][10]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][11]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][11]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][11]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][12]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][12]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][12]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][13]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][13]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][13]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][14]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][14]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][14]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][15]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][15]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][15]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][16]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][16]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][16]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][17]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][17]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][17]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][18]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][18]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][18]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][19]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][19]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][19]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][20]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][20]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][20]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][21]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][21]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][21]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][22]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][22]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][22]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][23]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][23]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][23]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][24]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][24]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][24]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][25]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][25]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][25]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][26]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][26]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][26]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][27]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][27]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][27]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][28]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][28]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][28]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][29]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][29]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][29]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][30]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][30]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][30]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][31]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][31]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][31]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][32]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][32]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][32]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][33]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][33]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][33]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][34]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][34]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][34]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][35]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][35]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][35]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][36]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][36]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][36]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][37]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][37]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][37]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][38]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][38]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][38]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][39]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][39]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][39]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][40]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][40]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][40]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][41]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][41]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][41]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][42]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][42]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][42]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][43]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][43]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][43]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][44]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][44]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][44]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][45]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][45]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][45]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][46]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][46]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][46]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][47]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][47]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][47]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][48]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][48]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][48]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][49]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][49]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][49]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][50]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][50]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][50]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][51]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][51]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][51]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][52]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][52]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][52]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][53]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][53]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][53]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][54]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][54]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][54]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][55]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][55]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][55]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][56]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][56]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][56]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][57]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][57]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][57]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][58]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][58]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][58]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][59]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][59]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][59]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][60]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][60]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][60]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][61]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][61]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][61]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][62]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][62]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][62]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][63]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][63]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][63]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][64]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][64]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][64]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][65]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][65]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][65]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][66]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][66]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][66]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][67]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][67]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][67]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][68]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][68]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][68]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][69]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][69]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][69]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][70]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][70]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][70]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][71]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][71]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][71]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][72]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][72]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][72]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][73]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][73]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][73]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][74]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][74]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][74]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][75]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][75]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][75]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][76]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][76]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][76]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][77]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][77]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][77]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][78]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][78]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][78]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][79]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][79]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][79]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][80]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][80]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][80]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][81]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][81]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][81]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][82]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][82]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][82]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][83]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][83]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][83]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][84]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][84]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][84]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][85]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][85]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][85]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][86]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][86]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][86]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][87]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][87]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][87]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][88]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][88]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][88]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][89]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][89]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][89]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][90]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][90]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][90]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][91]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][91]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][91]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][92]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][92]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][92]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][93]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][93]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][93]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][94]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][94]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][94]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][95]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][95]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][95]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[1][96]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][96]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_nreset400[0][96]                               ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[0][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[1][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[2][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[3][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[4][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[5][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[6][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[7][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[8][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[9][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[10][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[11][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[12][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[13][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[14][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[15][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[16][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[17][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[18][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[19][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[20][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[21][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[22][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[23][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[24][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[25][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[26][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[27][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[28][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[29][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[30][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[31][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[32][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[33][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[34][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[35][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[36][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[37][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[38][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[39][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[40][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[41][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[42][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[43][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[44][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[45][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[46][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[47][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[48][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[49][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[50][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[51][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[52][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[53][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[54][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[55][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[56][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[57][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[58][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[59][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[60][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[61][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[62][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[63][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[64][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[65][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[66][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[67][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[68][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[69][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[70][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[71][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[72][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[73][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[74][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[75][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[76][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[77][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[78][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[79][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[80][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[81][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[82][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[83][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[84][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[85][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[86][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[87][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[88][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[89][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[90][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[91][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[92][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[93][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[94][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[95][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[0]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[1]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[2]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[3]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[4]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[5]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[6]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[7]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[8]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[9]  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[10] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[11] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[12] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[13] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[14] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[15] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[16] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[17] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[18] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[19] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[20] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[21] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[22] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[23] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[24] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[25] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[26] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[27] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[28] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[29] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[30] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[31] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[32] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[33] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[34] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[35] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[36] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[37] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[38] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[39] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[40] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[41] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[42] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[43] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[44] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[45] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[46] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[47] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[48] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[49] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[50] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[51] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[52] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[53] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[54] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[55] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[56] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[57] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[58] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[59] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[60] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[61] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[62] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[63] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[64] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[65] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[66] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[67] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[68] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[69] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[70] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[71] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[72] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[73] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[74] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[75] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[76] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[77] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[78] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[79] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[80] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[81] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[82] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[83] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[84] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[85] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[86] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[87] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[88] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[89] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[90] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[91] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[92] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[93] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[94] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[95] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[16]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[17]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[18]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[19]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[20]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[21]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[22]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[23]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[24]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[25]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[26]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[27]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[28]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[29]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[30]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_fifo_L0_data_clr[31]                           ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_L0_fifo_error_clr[96] ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][0]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][1]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][2]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][3]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][4]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][5]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][6]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][7]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][8]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][9]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][10]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][11]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][12]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][13]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][14]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][15]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][16]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][17]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][18]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][19]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][20]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][21]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][22]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][23]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][24]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][25]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][26]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][27]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][28]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][29]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][30]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][31]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][32]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][33]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][34]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][35]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][36]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][37]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][38]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][39]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][40]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][41]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][42]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][43]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][44]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][45]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][46]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][47]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][48]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][49]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][50]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][51]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][52]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][53]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][54]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][55]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][56]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][57]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][58]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][59]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][60]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][61]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][62]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][63]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][64]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][65]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][66]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][67]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][68]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][69]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][70]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][71]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][72]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][73]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][74]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][75]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][76]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][77]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][78]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][79]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][80]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][81]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][82]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][83]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][84]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][85]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][86]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][87]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][88]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][89]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][90]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][91]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][92]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][93]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][94]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][95]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_globTrigger[0][96]    ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[1][96]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][13]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][14]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][15]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][16]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][17]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][18]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][19]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][20]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][21]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][22]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][23]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][24]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][25]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][26]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][27]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][28]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][29]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][30]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][31]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][32]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][33]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][34]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][35]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][36]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][37]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][38]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][39]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][40]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][41]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][42]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][43]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][44]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][45]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][46]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][47]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][48]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][49]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][50]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][51]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][52]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][53]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][54]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][55]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][56]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][57]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][58]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][59]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][60]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][61]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][62]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][63]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][64]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][65]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][66]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][67]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][68]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][69]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][70]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][71]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][72]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][73]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][74]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][75]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][76]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][77]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][78]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][79]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][80]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][81]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][82]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][83]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][84]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][85]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][86]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][87]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][88]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][89]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][90]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][91]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][92]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][93]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][94]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[1][95]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_reset[0][96]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][13]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][14]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][15]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][16]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][17]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][18]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][19]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][20]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][21]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][22]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][23]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][24]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][25]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][26]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][27]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][28]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][29]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][30]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][31]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][32]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][33]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][34]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][35]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][36]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][37]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][38]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][39]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][40]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][41]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][42]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][43]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][44]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][45]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][46]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][47]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][48]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][49]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][50]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][51]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][52]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][53]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][54]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][55]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][56]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][57]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][58]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][59]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][60]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][61]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][62]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][63]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][64]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][65]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][66]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][67]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][68]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][69]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][70]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][71]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][72]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][73]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][74]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][75]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][76]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][77]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][78]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][79]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][80]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][81]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][82]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][83]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][84]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][85]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][86]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][87]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][88]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][89]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][90]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][91]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][92]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][93]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][94]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_sc_config[0][95]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][0]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][1]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][2]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][3]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][4]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][5]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][6]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][7]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][8]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][9]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][10]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][11]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][12]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][13]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][14]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][15]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][16]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][17]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][18]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][19]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][20]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][21]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][22]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][23]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][24]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][25]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][26]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][27]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][28]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][29]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][30]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][31]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][32]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][33]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][34]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][35]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][36]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][37]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][38]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][39]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][40]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][41]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][42]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][43]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][44]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][45]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][46]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][47]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][48]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][49]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][50]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][51]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][52]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][53]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][54]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][55]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][56]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][57]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][58]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][59]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][60]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][61]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][62]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][63]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][64]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][65]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][66]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][67]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][68]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][69]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][70]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][71]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][72]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][73]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][74]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][75]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][76]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][77]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][78]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][79]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][80]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][81]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][82]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][83]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][84]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][85]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][86]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][87]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][88]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][89]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][90]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][91]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][92]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][93]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][94]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[1][95]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][0]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][1]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][2]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][3]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][4]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][5]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][6]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][7]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][8]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][9]                                  ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][10]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][11]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][12]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][13]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][14]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][15]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][16]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][17]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][18]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][19]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][20]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][21]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][22]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][23]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][24]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][25]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][26]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][27]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][28]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][29]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][30]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][31]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][32]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][33]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][34]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][35]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][36]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][37]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][38]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][39]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][40]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][41]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][42]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][43]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][44]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][45]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][46]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][47]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][48]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][49]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][50]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][51]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][52]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][53]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][54]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][55]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][56]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][57]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][58]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][59]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][60]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][61]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][62]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][63]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][64]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][65]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][66]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][67]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][68]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][69]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][70]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][71]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][72]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][73]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][74]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][75]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][76]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][77]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][78]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][79]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][80]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][81]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][82]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][83]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][84]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][85]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][86]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][87]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][88]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][89]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][90]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][91]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][92]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][93]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][94]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_in[0][95]                                 ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][0]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][0]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][1]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][1]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][2]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][2]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][3]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][3]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][4]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][4]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][5]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][5]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][6]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][6]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][7]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][7]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][8]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][8]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][9]       ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][9]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][10]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][10]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][11]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][11]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][12]      ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][12]     ; yes                                                              ; yes                                        ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][12]     ; yes                                                              ; yes                                        ;
+------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------+--------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------+
; Logic Cells Representing Combinational Loops                                                                            ;
+--------------------------------------------------------------------------------------------------------------------+----+
; Logic Cell Name                                                                                                    ;    ;
+--------------------------------------------------------------------------------------------------------------------+----+
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0 ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0 ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER|p_main~0  ;    ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER|p_main~0                       ;    ;
; Number of logic cells representing combinational loops                                                             ; 13 ;
+--------------------------------------------------------------------------------------------------------------------+----+
Note: All cells listed above may not be present at the end of synthesis due to various synthesis optimizations.


+---------------------------------------------------------------------------------------------------------------------------------------+
; Registers Duplicated to Honor Maximum Fanout Requirements                                                                             ;
+------------------------------------------------------------------+----------------------------+---------------------------------------+
; Register Name                                                    ; Maximum Fanout Requirement ; Number of Duplicate Registers Created ;
+------------------------------------------------------------------+----------------------------+---------------------------------------+
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|sl_int_fifo_L0_error_clr400[1] ; 50                         ; 1                                     ;
+------------------------------------------------------------------+----------------------------+---------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Removed During Synthesis                                                                                                                                                                                               ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------+
; Register name                                                                                                                                                                           ; Reason for Removal                     ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------+
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,26,28,30,31]                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,24,26,28,30,31]                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,25,26,28,30,31]                                                                      ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,24..26,28,30,31]                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,27,28,30,31]                                                                         ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,24,27,28,30,31]                                                                      ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,25,27,28,30,31]                                                                      ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,24,25,27,28,30,31]                                                                   ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,26..28,30,31]                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,24,26..28,30,31]                                                                     ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,25..28,30,31]                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|sl_int_fifo_L1_din[12..14,24..28,30,31]                                                                        ; Stuck at GND due to stuck port data_in ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_bwp|dffe9a[2]       ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_brp|dffe9a[2]       ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3] ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp|dffe9a[3]  ; Lost fanout                            ;
; AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp|dffe9a[3]  ; Lost fanout                            ;
; Total Number of Removed Registers = 294                                                                                                                                                 ;                                        ;
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+----------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                                                                                                                                                             ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output                                                                                                                                   ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; 8:1                ; 768 bits  ; 3840 LEs      ; 3840 LEs             ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_delay_1st_mux[0][0]                                               ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[95][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[94][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[93][8]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[92][8]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[91][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[90][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[89][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[88][3]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[87][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[86][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[85][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[84][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[83][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[82][9]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[81][8]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[80][7]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[79][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[78][7]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[77][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[76][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[75][9]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[74][8]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[73][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[72][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[71][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[70][1]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[69][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[68][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[67][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[66][1]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[65][5]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[64][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[63][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[62][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[61][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[60][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[59][0]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[58][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[57][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[56][7]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[55][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[54][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[53][4]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[52][3]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[51][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[50][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[49][0]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[48][3]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[47][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[46][7]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[45][0]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[44][7]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[43][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[42][1]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[41][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[40][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[39][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[38][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[37][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[36][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[35][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[34][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[33][9]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[32][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[31][4]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[30][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[29][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[28][5]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[27][6]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[26][0]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[25][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[24][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[23][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[22][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[21][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[20][5]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[19][5]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[18][4]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[17][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[16][9]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[15][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[14][10]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[13][11]                             ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[12][2]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[11][1]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[10][4]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[9][7]                               ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[8][7]                               ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[7][2]                               ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[6][4]                               ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[5][4]                               ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[4][10]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[3][11]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[2][0]                               ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[1][11]                              ;
; 3:1                ; 12 bits   ; 24 LEs        ; 0 LEs                ; 24 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_h[0][0]                               ;
; 8:1                ; 96 bits   ; 480 LEs       ; 480 LEs              ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|sl_int_trig_delay[0][82]                                                      ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX|Selector0  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX|Selector2  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX|Selector0  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX|Selector3  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX|Selector1  ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX|Selector0 ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[95][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[94][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[93][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[92][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[91][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[90][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[89][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[88][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[87][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[86][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[85][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[84][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[83][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[82][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[81][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[80][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[79][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[78][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[77][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[76][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[75][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[74][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[73][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[72][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[71][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[70][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[69][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[68][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[67][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[66][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[65][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[64][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[63][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[62][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[61][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[60][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[59][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[58][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[57][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[56][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[55][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[54][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[53][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[52][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[51][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[50][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[49][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[48][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[47][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[46][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[45][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[44][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[43][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[42][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[41][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[40][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[39][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[38][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[37][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[36][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[35][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[34][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[33][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[32][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[31][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[30][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[29][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[28][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[27][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[26][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[25][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[24][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[23][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[22][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[21][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[20][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[19][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[18][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[17][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[16][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[15][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[14][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[13][0]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[12][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[11][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[10][1]                              ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[9][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[8][1]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[7][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[6][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[5][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[4][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[3][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[2][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[1][0]                               ;
; 3:1                ; 2 bits    ; 4 LEs         ; 4 LEs                ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_triggered[0][0]                               ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX|Selector1 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|sl_int_fifo_L1_din[10]                                                ;
; 3:1                ; 19 bits   ; 38 LEs        ; 0 LEs                ; 38 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|sl_int_counter_c[2]                                  ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|sl_int_fifo_L1_din[6]                                                 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX|Selector0 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                 ;
; 13:1               ; 32 bits   ; 256 LEs       ; 256 LEs              ; 0 LEs                  ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|sl_int_fifo_L2_din[3]                                                                      ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX|Selector0 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX|Selector3 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX|Selector1 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX|Selector2 ;
; 6:1                ; 2 bits    ; 8 LEs         ; 6 LEs                ; 2 LEs                  ; No         ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX|Selector1 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|sl_int_fifo_L1_din[7]                                                 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|sl_int_fifo_L1_din[6]                                                 ;
; 9:1                ; 18 bits   ; 108 LEs       ; 72 LEs               ; 36 LEs                 ; Yes        ; |AID_AIDA_FEB|AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|sl_int_fifo_L1_din[6]                                                 ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER          ;
+-------------------+-------+------+--------------------------------+
; Assignment        ; Value ; From ; To                             ;
+-------------------+-------+------+--------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_error_clr400[1] ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_error_clr400[0] ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0h_error100[1]    ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0h_error100[0]    ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0c_error100[1]    ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0c_error100[0]    ;
; MAX_FANOUT        ; 50    ; -    ; sl_int_fifo_L0_error_clr400[0] ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nresetDCO[0]            ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nresetDCO[1]            ;
; MAX_FANOUT        ; 50    ; -    ; sl_int_fifo_L0_error_clr400[1] ;
+-------------------+-------+------+--------------------------------+


+-----------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER ;
+-------------------+-------+------+------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                   ;
+-------------------+-------+------+------------------------------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][96]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][95]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][94]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][93]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][92]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][91]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][90]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][89]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][88]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][87]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][86]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][85]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][84]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][83]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][82]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][81]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][80]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][79]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][78]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][77]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][76]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][75]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][74]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][73]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][72]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][71]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][70]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][69]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][68]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][67]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][66]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][65]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][64]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][63]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][62]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][61]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][60]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][59]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][58]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][57]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][56]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][55]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][54]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][53]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][52]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][51]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][50]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][49]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][48]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][47]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][46]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][45]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][44]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][43]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][42]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][41]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][40]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][39]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][38]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][37]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][36]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][35]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][34]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][33]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][32]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][31]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][30]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][29]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][28]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][27]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][26]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][25]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][24]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][23]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][22]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][21]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][20]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][19]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][18]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][17]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][16]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][15]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][14]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][13]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][12]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][11]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][10]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][9]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][8]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][7]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][6]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][5]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][4]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][3]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][2]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][1]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[1][0]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][96]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][95]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][94]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][93]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][92]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][91]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][90]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][89]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][88]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][87]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][86]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][85]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][84]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][83]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][82]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][81]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][80]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][79]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][78]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][77]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][76]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][75]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][74]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][73]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][72]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][71]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][70]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][69]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][68]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][67]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][66]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][65]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][64]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][63]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][62]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][61]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][60]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][59]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][58]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][57]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][56]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][55]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][54]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][53]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][52]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][51]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][50]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][49]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][48]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][47]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][46]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][45]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][44]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][43]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][42]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][41]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][40]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][39]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][38]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][37]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][36]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][35]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][34]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][33]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][32]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][31]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][30]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][29]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][28]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][27]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][26]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][25]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][24]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][23]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][22]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][21]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][20]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][19]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][18]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][17]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][16]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][15]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][14]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][13]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][12]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][11]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][10]                              ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][9]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][8]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][7]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][6]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][5]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][4]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][3]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][2]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][1]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_nreset400[0][0]                               ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][95]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][94]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][93]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][92]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][91]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][90]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][89]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][88]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][87]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][86]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][85]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][84]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][83]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][82]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][81]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][80]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][79]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][78]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][77]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][76]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][75]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][74]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][73]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][72]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][71]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][70]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][69]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][68]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][67]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][66]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][65]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][64]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][63]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][62]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][61]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][60]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][59]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][58]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][57]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][56]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][55]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][54]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][53]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][52]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][51]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][50]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][49]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][48]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][47]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][46]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][45]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][44]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][43]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][42]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][41]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][40]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][39]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][38]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][37]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][36]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][35]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][34]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][33]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][32]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][31]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][30]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][29]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][28]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][27]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][26]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][25]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][24]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][23]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][22]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][21]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][20]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][19]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][18]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][17]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][16]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][15]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][14]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][13]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][12]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][11]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][10]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][9]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][8]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][7]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][6]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][5]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][4]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][3]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][2]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][1]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[1][0]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][95]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][94]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][93]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][92]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][91]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][90]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][89]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][88]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][87]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][86]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][85]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][84]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][83]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][82]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][81]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][80]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][79]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][78]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][77]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][76]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][75]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][74]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][73]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][72]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][71]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][70]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][69]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][68]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][67]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][66]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][65]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][64]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][63]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][62]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][61]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][60]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][59]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][58]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][57]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][56]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][55]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][54]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][53]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][52]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][51]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][50]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][49]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][48]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][47]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][46]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][45]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][44]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][43]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][42]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][41]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][40]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][39]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][38]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][37]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][36]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][35]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][34]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][33]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][32]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][31]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][30]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][29]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][28]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][27]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][26]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][25]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][24]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][23]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][22]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][21]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][20]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][19]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][18]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][17]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][16]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][15]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][14]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][13]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][12]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][11]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][10]                                ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][9]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][8]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][7]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][6]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][5]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][4]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][3]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][2]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][1]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_trig_in[0][0]                                 ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[0]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[1]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[2]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[3]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[4]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[5]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[6]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[7]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[8]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[9]                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[10]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[11]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[12]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[13]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[14]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[15]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[16]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[17]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[18]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[19]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[20]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[21]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[22]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[23]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[24]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[25]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[26]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[27]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[28]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[29]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[30]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[31]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[32]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[33]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[34]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[35]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[36]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[37]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[38]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[39]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[40]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[41]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[42]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[43]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[44]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[45]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[46]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[47]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[48]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[49]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[50]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[51]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[52]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[53]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[54]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[55]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[56]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[57]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[58]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[59]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[60]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[61]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[62]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[63]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[64]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[65]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[66]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[67]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[68]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[69]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[70]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[71]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[72]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[73]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[74]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[75]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[76]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[77]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[78]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[79]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[80]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[81]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[82]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[83]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[84]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[85]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[86]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[87]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[88]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[89]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[90]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[91]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[92]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[93]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[94]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[95]                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_fifo_L0_data_clr[96]                          ;
+-------------------+-------+------+------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC ;
+-------------------+-------+------+-------------------------------------------------------------------------------+
; Assignment        ; Value ; From ; To                                                                            ;
+-------------------+-------+------+-------------------------------------------------------------------------------+
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[96]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[95]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[94]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[93]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[92]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[91]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[90]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[89]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[88]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[87]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[86]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[85]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[84]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[83]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[82]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[81]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[80]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[79]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[78]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[77]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[76]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[75]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[74]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[73]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[72]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[71]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[70]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[69]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[68]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[67]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[66]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[65]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[64]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[63]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[62]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[61]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[60]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[59]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[58]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[57]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[56]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[55]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[54]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[53]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[52]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[51]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[50]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[49]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[48]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[47]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[46]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[45]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[44]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[43]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[42]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[41]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[40]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[39]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[38]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[37]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[36]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[35]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[34]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[33]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[32]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[31]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[30]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[29]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[28]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[27]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[26]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[25]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[24]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[23]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[22]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[21]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[20]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[19]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[18]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[17]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[16]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[15]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[14]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[13]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[12]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[11]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[10]                                                  ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[9]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[8]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[7]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[6]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[5]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[4]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[3]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[2]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[1]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0_fifo_error_clr[0]                                                   ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[95]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[94]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[93]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[92]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[91]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[90]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[89]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[88]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[87]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[86]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[85]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[84]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[83]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[82]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[81]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[80]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[79]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[78]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[77]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[76]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[75]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[74]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[73]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[72]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[71]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[70]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[69]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[68]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[67]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[66]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[65]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[64]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[63]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[62]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[61]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[60]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[59]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[58]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[57]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[56]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[55]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[54]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[53]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[52]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[51]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[50]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[49]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[48]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[47]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[46]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[45]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[44]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[43]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[42]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[41]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[40]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[39]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[38]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[37]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[36]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[35]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[34]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[33]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[32]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[31]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[30]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[29]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[28]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[27]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[26]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[25]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[24]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[23]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[22]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[21]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[20]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[19]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[18]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[17]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[16]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[15]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[14]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[13]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[12]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[11]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[10]                                                          ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[9]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[8]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[7]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[6]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[5]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[4]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[3]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[2]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[1]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_L0h_error[0]                                                           ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[95][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[95][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[94][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[94][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[93][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[93][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[92][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[92][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[91][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[91][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[90][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[90][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[89][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[89][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[88][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[88][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[87][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[87][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[86][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[86][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[85][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[85][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[84][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[84][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[83][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[83][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[82][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[82][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[81][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[81][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[80][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[80][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[79][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[79][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[78][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[78][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[77][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[77][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[76][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[76][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[75][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[75][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[74][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[74][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[73][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[73][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[72][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[72][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[71][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[71][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[70][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[70][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[69][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[69][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[68][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[68][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[67][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[67][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[66][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[66][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[65][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[65][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[64][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[64][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[63][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[63][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[62][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[62][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[61][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[61][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[60][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[60][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[59][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[59][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[58][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[58][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[57][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[57][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[56][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[56][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[55][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[55][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[54][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[54][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[53][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[53][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[52][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[52][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[51][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[51][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[50][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[50][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[49][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[49][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[48][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[48][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[47][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[47][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[46][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[46][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[45][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[45][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[44][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[44][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[43][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[43][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[42][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[42][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[41][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[41][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[40][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[40][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[39][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[39][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[38][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[38][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[37][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[37][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[36][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[36][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[35][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[35][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[34][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[34][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[33][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[33][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[32][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[32][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[31][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[31][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[30][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[30][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[29][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[29][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[28][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[28][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[27][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[27][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[26][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[26][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[25][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[25][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[24][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[24][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[23][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[23][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[22][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[22][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[21][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[21][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[20][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[20][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[19][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[19][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[18][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[18][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[17][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[17][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[16][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[16][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[15][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[15][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[14][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[14][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[13][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[13][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[12][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[12][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[11][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[11][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[10][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[10][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[9][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[9][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[8][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[8][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[7][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[7][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[6][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[6][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[5][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[5][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[4][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[4][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[3][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[3][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[2][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[2][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[1][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[1][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[0][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_triggered[0][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[95][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[94][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[93][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[92][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[91][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[90][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[89][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[88][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[87][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[86][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[85][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[84][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[83][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[82][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[81][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[80][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[79][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[78][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[77][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[76][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[75][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[74][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[73][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[72][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[71][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[70][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[69][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[68][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[67][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[66][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[65][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[64][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[63][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[62][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[61][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[60][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[59][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[58][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[57][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[56][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[55][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[54][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[53][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[52][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[51][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[50][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[49][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[48][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[47][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[46][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[45][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[44][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[43][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[42][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[41][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[40][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[39][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[38][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[37][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[36][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[35][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[34][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[33][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[32][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[31][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[30][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[29][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[28][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[27][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[26][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[25][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[24][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[23][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[22][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[21][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[20][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[19][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[18][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[17][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[16][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[15][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[14][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[13][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[12][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[11][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][12]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][11]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][10]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][9]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][8]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][7]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][6]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][5]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][4]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][3]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][2]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][1]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[10][0]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[9][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[8][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[7][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[6][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[5][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[4][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[3][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[2][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[1][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_counter_h[0][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][5]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][6]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][7]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][8]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][9]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][10]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][11]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][12]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][13]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][14]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][15]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][16]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][17]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][18]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][19]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][20]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][21]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][22]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][23]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][24]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][25]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][26]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][27]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][28]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][29]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][30]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][31]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][32]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][33]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][34]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][35]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][36]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][37]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][38]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][39]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][40]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][41]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][42]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][43]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][44]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][45]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][46]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][47]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][48]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][49]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][50]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][51]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][52]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][53]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][54]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][55]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][56]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][57]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][58]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][59]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][60]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][61]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][62]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][63]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][64]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][65]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][66]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][67]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][68]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][69]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][70]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][71]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][72]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][73]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][74]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][75]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][76]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][77]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][78]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][79]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][80]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][81]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][82]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][83]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][84]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][85]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][86]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][87]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][88]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][89]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][90]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][91]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][92]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][93]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][94]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][95]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[0][96]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][0]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][1]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][2]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][3]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][4]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][5]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][6]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][7]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][8]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][9]                                                      ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][10]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][11]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][12]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][13]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][14]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][15]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][16]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][17]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][18]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][19]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][20]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][21]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][22]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][23]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][24]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][25]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][26]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][27]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][28]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][29]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][30]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][31]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][32]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][33]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][34]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][35]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][36]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][37]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][38]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][39]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][40]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][41]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][42]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][43]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][44]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][45]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][46]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][47]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][48]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][49]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][50]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][51]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][52]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][53]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][54]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][55]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][56]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][57]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][58]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][59]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][60]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][61]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][62]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][63]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][64]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][65]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][66]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][67]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][68]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][69]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][70]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][71]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][72]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][73]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][74]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][75]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][76]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][77]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][78]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][79]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][80]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][81]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][82]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][83]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][84]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][85]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][86]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][87]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][88]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][89]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][90]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][91]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][92]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][93]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][94]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][95]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_globTrigger[1][96]                                                     ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][13]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][14]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][15]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][16]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][17]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][18]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][19]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][20]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][21]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][22]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][23]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][24]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][25]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][26]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][27]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][28]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][29]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][30]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][31]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][32]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][33]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][34]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][35]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][36]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][37]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][38]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][39]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][40]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][41]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][42]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][43]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][44]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][45]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][46]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][47]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][48]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][49]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][50]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][51]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][52]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][53]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][54]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][55]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][56]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][57]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][58]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][59]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][60]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][61]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][62]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][63]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][64]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][65]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][66]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][67]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][68]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][69]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][70]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][71]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][72]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][73]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][74]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][75]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][76]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][77]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][78]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][79]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][80]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][81]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][82]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][83]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][84]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][85]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][86]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][87]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][88]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][89]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][90]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][91]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][92]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][93]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][94]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][95]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[0][96]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][0]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][1]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][2]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][3]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][4]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][5]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][6]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][7]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][8]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][9]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][10]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][11]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][12]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][13]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][14]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][15]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][16]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][17]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][18]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][19]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][20]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][21]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][22]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][23]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][24]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][25]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][26]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][27]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][28]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][29]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][30]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][31]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][32]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][33]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][34]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][35]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][36]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][37]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][38]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][39]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][40]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][41]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][42]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][43]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][44]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][45]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][46]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][47]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][48]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][49]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][50]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][51]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][52]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][53]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][54]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][55]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][56]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][57]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][58]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][59]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][60]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][61]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][62]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][63]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][64]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][65]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][66]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][67]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][68]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][69]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][70]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][71]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][72]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][73]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][74]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][75]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][76]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][77]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][78]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][79]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][80]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][81]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][82]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][83]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][84]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][85]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][86]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][87]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][88]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][89]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][90]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][91]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][92]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][93]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][94]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][95]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_config[1][96]                                                       ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][0]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][1]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][2]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][3]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][4]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][5]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][6]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][7]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][8]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][9]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][10]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][11]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][12]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][13]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][14]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][15]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][16]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][17]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][18]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][19]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][20]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][21]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][22]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][23]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][24]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][25]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][26]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][27]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][28]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][29]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][30]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][31]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][32]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][33]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][34]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][35]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][36]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][37]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][38]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][39]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][40]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][41]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][42]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][43]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][44]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][45]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][46]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][47]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][48]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][49]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][50]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][51]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][52]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][53]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][54]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][55]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][56]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][57]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][58]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][59]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][60]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][61]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][62]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][63]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][64]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][65]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][66]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][67]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][68]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][69]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][70]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][71]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][72]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][73]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][74]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][75]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][76]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][77]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][78]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][79]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][80]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][81]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][82]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][83]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][84]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][85]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][86]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][87]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][88]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][89]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][90]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][91]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][92]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][93]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][94]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][95]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[0][96]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][0]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][1]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][2]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][3]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][4]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][5]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][6]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][7]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][8]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][9]                                                         ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][10]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][11]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][12]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][13]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][14]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][15]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][16]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][17]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][18]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][19]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][20]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][21]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][22]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][23]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][24]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][25]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][26]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][27]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][28]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][29]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][30]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][31]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][32]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][33]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][34]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][35]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][36]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][37]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][38]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][39]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][40]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][41]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][42]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][43]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][44]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][45]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][46]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][47]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][48]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][49]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][50]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][51]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][52]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][53]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][54]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][55]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][56]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][57]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][58]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][59]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][60]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][61]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][62]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][63]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][64]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][65]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][66]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][67]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][68]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][69]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][70]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][71]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][72]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][73]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][74]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][75]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][76]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][77]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][78]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][79]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][80]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][81]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][82]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][83]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][84]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][85]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][86]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][87]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][88]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][89]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][90]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][91]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][92]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][93]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][94]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][95]                                                        ;
; PRESERVE_REGISTER ; on    ; -    ; sl_int_sc_reset[1][96]                                                        ;
+-------------------+-------+------+-------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                   ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                    ;
+---------------------------------+-------+------+------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                              ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                               ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                               ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                         ;
+---------------------------------+-------+------+---------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                           ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                   ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                      ;
+----------------+-------+------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                  ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                   ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                    ;
+-----------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                    ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                     ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                               ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                                ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                          ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                            ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                                    ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                       ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                  ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                   ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                                    ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                                     ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                                ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                                 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                              ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                               ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                         ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                          ;
; REMOVE_DUPLICATE_REGISTERS      ; OFF   ; -    ; -                                                                                                                          ;
; POWER_UP_LEVEL                  ; LOW   ; -    ; wrptr_g                                                                                                                    ;
+---------------------------------+-------+------+----------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_bn6:rdptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                      ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter5a0                                                                                                                                                              ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity6                                                                                                                                                                 ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_75c:wrptr_g1p ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment     ; Value ; From ; To                                                                                                                                                                      ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; POWER_UP_LEVEL ; HIGH  ; -    ; counter7a0                                                                                                                                                              ;
; POWER_UP_LEVEL ; LOW   ; -    ; parity8                                                                                                                                                                 ;
+----------------+-------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_brp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                            ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                             ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_bwp ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                            ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                             ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                              ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                               ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp|dffpipe_jd9:dffpipe10 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                          ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                           ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment            ; Value ; From ; To                                                                                                                                                              ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF   ; -    ; -                                                                                                                                                               ;
+-----------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp|dffpipe_kd9:dffpipe13 ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value ; From ; To                                                                                                                                                                          ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF   ; -    ; -                                                                                                                                                                           ;
+---------------------------------+-------+------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                 ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                 ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                  ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1 ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                                                                                                                 ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                                                                                                                  ;
+---------------------------------+--------------------+------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER ;
+--------------------+-------+---------------------------------------------------+
; Parameter Name     ; Value ; Type                                              ;
+--------------------+-------+---------------------------------------------------+
; x_reset_active     ; '0'   ; Enumerated                                        ;
; x_nbchannelpertcsm ; 8     ; Signed Integer                                    ;
; x_nbtcsmperasic    ; 4     ; Signed Integer                                    ;
; x_nbeventlimit     ; 01010 ; Unsigned Binary                                   ;
+--------------------+-------+---------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER ;
+----------------+-------+--------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                           ;
; x_nbchannel    ; 96    ; Signed Integer                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                          ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                    ;
; x_nbchannel    ; 96    ; Signed Integer                                                                                                ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:0:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:1:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:2:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:3:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:4:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:5:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:6:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:7:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:8:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:9:C_GTRIG_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:10:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:11:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:12:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:13:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:14:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:15:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:16:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:17:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:18:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:19:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:20:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:21:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:22:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:23:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:24:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:25:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:26:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:27:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:28:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:29:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:30:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:31:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:32:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:33:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:34:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:35:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:36:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:37:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:38:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:39:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:40:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:41:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:42:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:43:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:44:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:45:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:46:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:47:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:48:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:49:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:50:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:51:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:52:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:53:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:54:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:55:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:56:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:57:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:58:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:59:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:60:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:61:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:62:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:63:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:64:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:65:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:66:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:67:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:68:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:69:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:70:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:71:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:72:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:73:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:74:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:75:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:76:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:77:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:78:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:79:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:80:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:81:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:82:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:83:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:84:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:85:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:86:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:87:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:88:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:89:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:90:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:91:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:92:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:93:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:94:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:95:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_OnePulse:\C_GTRIG_PULSE:96:C_GTRIG_PULSEX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                      ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:1:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:2:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:3:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:4:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:5:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:6:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:7:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:8:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:9:C_EDGE_PULSEX ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                              ;
+----------------+-------+---------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:10:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:11:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:12:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:13:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:14:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:15:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:16:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:17:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:18:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:19:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:20:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:21:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:22:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:23:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:24:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:25:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:26:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:27:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:28:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:29:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:30:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:31:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:32:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:33:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:34:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:35:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:36:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:37:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:38:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:39:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:40:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:41:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:42:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:43:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:44:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:45:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:46:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:47:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:48:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:49:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:50:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:51:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:52:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:53:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:54:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:55:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:56:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:57:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:58:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:59:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:60:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:61:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:62:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:63:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:64:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:65:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:66:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:67:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:68:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:69:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:70:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:71:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:72:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:73:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:74:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:75:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:76:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:77:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:78:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:79:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:80:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:81:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:82:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:83:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:84:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:85:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:86:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:87:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:88:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:89:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:90:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:91:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:92:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:93:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:94:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:95:C_EDGE_PULSEX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                                     ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:1:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:2:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:3:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:4:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:5:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:6:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:7:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:8:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:9:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                 ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                       ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                              ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                              ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                              ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                           ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                         ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                       ;
+------------------------+---------+----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:10:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:11:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:12:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:13:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:14:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:15:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:16:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:17:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:18:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:19:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:20:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:21:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:22:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:23:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:24:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:25:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:26:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:27:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:28:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:29:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:30:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:31:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:32:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:33:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:34:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:35:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:36:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:37:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:38:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:39:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:40:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:41:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:42:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:43:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:44:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:45:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:46:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:47:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:48:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:49:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:50:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:51:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:52:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:53:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:54:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:55:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:56:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:57:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:58:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:59:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:60:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:61:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:62:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:63:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:64:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:65:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:66:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:67:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:68:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:69:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:70:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:71:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:72:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:73:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:74:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:75:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:76:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:77:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:78:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:79:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:80:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:81:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:82:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:83:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:84:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:85:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:86:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:87:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:88:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:89:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:90:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:91:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:92:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:93:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:94:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:95:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name         ; Value   ; Type                                                                                                                                                                  ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; LPM_WIDTH              ; 64      ; Signed Integer                                                                                                                                                        ;
; LPM_DIRECTION          ; LEFT    ; Untyped                                                                                                                                                               ;
; LPM_AVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; LPM_SVALUE             ; UNUSED  ; Untyped                                                                                                                                                               ;
; DEVICE_FAMILY          ; Arria V ; Untyped                                                                                                                                                               ;
; AUTO_CARRY_CHAINS      ; ON      ; AUTO_CARRY                                                                                                                                                            ;
; IGNORE_CARRY_BUFFERS   ; OFF     ; IGNORE_CARRY                                                                                                                                                          ;
; AUTO_CASCADE_CHAINS    ; ON      ; AUTO_CASCADE                                                                                                                                                          ;
; IGNORE_CASCADE_BUFFERS ; OFF     ; IGNORE_CASCADE                                                                                                                                                        ;
+------------------------+---------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:1:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:2:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:3:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:4:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:5:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:6:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:7:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:8:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:9:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                             ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                          ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                        ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                        ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                      ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                      ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                      ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                      ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                             ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                             ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                             ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                             ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                             ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                             ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                             ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                      ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                             ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                             ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                             ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                             ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                             ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                             ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                             ;
+-------------------------+-------------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:10:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:11:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:12:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:13:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:14:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:15:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:16:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:17:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:18:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:19:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:20:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:21:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:22:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:23:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:24:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:25:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:26:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:27:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:28:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:29:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:30:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:31:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:32:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:33:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:34:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:35:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:36:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:37:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:38:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:39:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:40:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:41:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:42:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:43:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:44:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:45:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:46:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:47:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:48:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:49:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:50:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:51:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:52:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:53:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:54:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:55:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:56:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:57:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:58:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:59:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:60:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:61:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:62:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:63:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:64:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:65:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:66:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:67:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:68:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:69:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:70:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:71:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:72:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:73:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:74:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:75:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:76:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:77:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:78:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:79:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:80:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:81:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:82:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:83:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:84:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:85:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:86:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:87:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:88:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:89:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:90:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:91:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:92:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:93:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:94:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:95:C_FIFO_HITX|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                                 ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                              ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                           ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                         ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                         ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                       ;
; LPM_WIDTH               ; 18          ; Signed Integer                                                                                                                       ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                                       ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                                       ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                              ;
; UNDERFLOW_CHECKING      ; OFF         ; Untyped                                                                                                                              ;
; OVERFLOW_CHECKING       ; OFF         ; Untyped                                                                                                                              ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                              ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                              ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                              ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                              ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                       ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                              ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                              ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                              ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                              ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                              ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                              ;
; CBXI_PARAMETER          ; dcfifo_ohv1 ; Untyped                                                                                                                              ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                                           ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------+
; WIDTH_BYTEENA           ; 1           ; Untyped                                                                                                                        ;
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                                 ;
; LPM_WIDTH               ; 21          ; Signed Integer                                                                                                                 ;
; LPM_NUMWORDS            ; 4           ; Signed Integer                                                                                                                 ;
; LPM_WIDTHU              ; 2           ; Signed Integer                                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                                        ;
; USE_EAB                 ; ON          ; Untyped                                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                                        ;
; DELAY_RDUSEDW           ; 1           ; Untyped                                                                                                                        ;
; DELAY_WRUSEDW           ; 1           ; Untyped                                                                                                                        ;
; RDSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                 ;
; WRSYNC_DELAYPIPE        ; 4           ; Signed Integer                                                                                                                 ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE       ; Untyped                                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                                        ;
; ADD_USEDW_MSB_BIT       ; OFF         ; Untyped                                                                                                                        ;
; WRITE_ACLR_SYNCH        ; OFF         ; Untyped                                                                                                                        ;
; READ_ACLR_SYNCH         ; OFF         ; Untyped                                                                                                                        ;
; CBXI_PARAMETER          ; dcfifo_abv1 ; Untyped                                                                                                                        ;
+-------------------------+-------------+--------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:1:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:2:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:3:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:4:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:5:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:6:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:7:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:8:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:9:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                           ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                     ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                   ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                   ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                 ;
; lpm_width               ; 32          ; Signed Integer                                                                                                 ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                 ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                 ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                        ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                        ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                        ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                        ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                        ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                        ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                 ;
; USE_EAB                 ; ON          ; Untyped                                                                                                        ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                        ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                        ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                        ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                        ;
+-------------------------+-------------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:10:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                            ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                  ;
; lpm_width               ; 32          ; Signed Integer                                                                                                  ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                  ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                         ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:11:C_FIFO_L1_HITX|scfifo:scfifo_component ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name          ; Value       ; Type                                                                                                            ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                                                                                      ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                                                                                    ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                                                                                    ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                                                                                                  ;
; lpm_width               ; 32          ; Signed Integer                                                                                                  ;
; LPM_NUMWORDS            ; 8           ; Signed Integer                                                                                                  ;
; LPM_WIDTHU              ; 3           ; Signed Integer                                                                                                  ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                                                                                         ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                                                                                         ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                                                                                         ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                                                                                         ;
; ADD_RAM_OUTPUT_REGISTER ; OFF         ; Untyped                                                                                                         ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                                                                                         ;
; ALMOST_EMPTY_VALUE      ; 2           ; Signed Integer                                                                                                  ;
; USE_EAB                 ; ON          ; Untyped                                                                                                         ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                                                                                         ;
; DEVICE_FAMILY           ; Arria V     ; Untyped                                                                                                         ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                                                                                         ;
; CBXI_PARAMETER          ; scfifo_q3h1 ; Untyped                                                                                                         ;
+-------------------------+-------------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 0     ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 8     ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 16    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 24    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 32    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 40    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 48    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 56    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 64    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                         ;
+----------------+-------+----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                               ;
; x_basechannel  ; 72    ; Signed Integer                                                                               ;
+----------------+-------+----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                          ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                      ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                        ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                  ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                              ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                          ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                    ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                ;
; x_basechannel  ; 80    ; Signed Integer                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                    ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                          ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                    ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                ;
; x_basechannel  ; 88    ; Signed Integer                                                                                ;
+----------------+-------+-----------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                                 ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                           ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                       ;
+----------------+-------+--------------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                          ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                    ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                                ;
+----------------+-------+-------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                                         ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                                   ;
; x_nbchannel    ; 8     ; Signed Integer                                                                                                               ;
+----------------+-------+------------------------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM ;
+-------------------+-------+----------------------------------------------------------------------+
; Parameter Name    ; Value ; Type                                                                 ;
+-------------------+-------+----------------------------------------------------------------------+
; x_reset_active    ; '0'   ; Enumerated                                                           ;
; x_nbchannel       ; 12    ; Signed Integer                                                       ;
; x_fifo_data_width ; 32    ; Signed Integer                                                       ;
; x_nbeventlimit    ; 01010 ; Unsigned Binary                                                      ;
+-------------------+-------+----------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:7:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:8:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-----------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:9:C_RX ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                           ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                     ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                 ;
+----------------+-------+----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+------------------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:10:C_RX ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                            ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                                      ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                                  ;
+----------------+-------+-----------------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+----------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER ;
+----------------+-------+---------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                    ;
+----------------+-------+---------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                              ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                          ;
+----------------+-------+---------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER ;
+----------------+-------+--------------------------------------------------------------------------------------------------------+
; Parameter Name ; Value ; Type                                                                                                   ;
+----------------+-------+--------------------------------------------------------------------------------------------------------+
; x_reset_active ; '0'   ; Enumerated                                                                                             ;
; x_nbchannel    ; 12    ; Signed Integer                                                                                         ;
+----------------+-------+--------------------------------------------------------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------------------------------------------------+
; Partition Dependent Files                                                                                     ;
+---------------------------------------------+--------------------+---------+----------------------------------+
; File                                        ; Location           ; Library ; Checksum                         ;
+---------------------------------------------+--------------------+---------+----------------------------------+
; libraries/megafunctions/a_dpfifo.inc        ; Quartus II Install ; work    ; 37c2d0bb70d5a3f83a4aa09e62c75080 ;
; libraries/megafunctions/a_f2fifo.inc        ; Quartus II Install ; work    ; cebe3836bad826c95e765f77477e8a8b ;
; libraries/megafunctions/a_fefifo.inc        ; Quartus II Install ; work    ; 05a44f50e786a1d286adceb227096b9f ;
; libraries/megafunctions/a_fffifo.inc        ; Quartus II Install ; work    ; aa34dd03c645beef0c31a3e4ef186db4 ;
; libraries/megafunctions/a_gray2bin.inc      ; Quartus II Install ; work    ; 7e4b761bbeb1a382a47a02f89c03e13e ;
; libraries/megafunctions/a_graycounter.inc   ; Quartus II Install ; work    ; c8eabdd6f8e7d384595a15fec5005aa8 ;
; libraries/megafunctions/a_i2fifo.inc        ; Quartus II Install ; work    ; bfe272f05af0cf849bd8b4748efceffe ;
; libraries/megafunctions/a_regfifo.inc       ; Quartus II Install ; work    ; 8b2977668c08752c10a1f1977c9b9ee6 ;
; libraries/megafunctions/aglobal140.inc      ; Quartus II Install ; work    ; 8d2bccb28a59085e58b0989ed3cd461a ;
; libraries/megafunctions/alt_sync_fifo.inc   ; Quartus II Install ; work    ; a019bef5b10e73079dfab915daa2a6c4 ;
; libraries/megafunctions/altdpram.inc        ; Quartus II Install ; work    ; 2f9e6727b678ffd76e72bc5a95a26300 ;
; libraries/megafunctions/altsyncram_fifo.inc ; Quartus II Install ; work    ; 04b2b21790828d0d59a04a16f08af58b ;
; libraries/megafunctions/dcfifo.tdf          ; Quartus II Install ; work    ; ebe58908c3df1db772864438eb78c0d9 ;
; libraries/megafunctions/dffeea.inc          ; Quartus II Install ; work    ; 0f11711657cd42ee78437f4349496034 ;
; libraries/megafunctions/dffpipe.inc         ; Quartus II Install ; work    ; 5471cd80ee441dd293de0ca0963c9aa0 ;
; libraries/megafunctions/lpm_add_sub.inc     ; Quartus II Install ; work    ; 144a73b61081a2a03554ff5acc5e8842 ;
; libraries/megafunctions/lpm_compare.inc     ; Quartus II Install ; work    ; bbd3e8c93afb7320934629e5fb011566 ;
; libraries/megafunctions/lpm_constant.inc    ; Quartus II Install ; work    ; 97ffb7e3fef9ce9fce4eff08455d5da5 ;
; libraries/megafunctions/lpm_counter.inc     ; Quartus II Install ; work    ; c5cfeeabc5f2ab60b3453f6abbc42b41 ;
; libraries/megafunctions/lpm_shiftreg.tdf    ; Quartus II Install ; work    ; 5414fa5e40b62781171ddd8efc6203ac ;
; libraries/megafunctions/scfifo.tdf          ; Quartus II Install ; work    ; 9f35cf3eb6299035a3d124cc5691dde9 ;
; ../../../lib/u_util/exp/u_size.vhd          ; Project Directory  ; work    ; 4c13385d4453e2f8b3fea6bada23c6f5 ;
; ../../../lib/u_util/exp/u_util.vhd          ; Project Directory  ; work    ; f295c07690c739a2414422a993640294 ;
; ../../../lib/u_util/src/u_edgepulse.vhd     ; Project Directory  ; work    ; 904284f156420da930f57bc044c1b3a3 ;
; ../../../lib/u_util/src/u_onepulse.vhd      ; Project Directory  ; work    ; c5d73f86d7dd0a099117b3b01ba6e92a ;
; db/a_dpfifo_2he1.tdf                        ; Project Directory  ; work    ; 13398ab9ecc2c5ee745fd01a0f3ea647 ;
; db/a_fefifo_m4f.tdf                         ; Project Directory  ; work    ; 52c0c20cebd29bb2f175cbfd1c772d00 ;
; db/a_gray2bin_c2b.tdf                       ; Project Directory  ; work    ; 630cf6a81acaed72ef50376b68bf025d ;
; db/a_gray2bin_d2b.tdf                       ; Project Directory  ; work    ; 21baf9331055dcaca8470643813e1b48 ;
; db/a_graycounter_75c.tdf                    ; Project Directory  ; work    ; bf81ce5cc2d7847d94f7c39a2e3754ea ;
; db/a_graycounter_85c.tdf                    ; Project Directory  ; work    ; a42df7c464c22d2a47ae9019582463a1 ;
; db/a_graycounter_bn6.tdf                    ; Project Directory  ; work    ; 61d24eaed6f4fd89006b16602f691e8b ;
; db/a_graycounter_cn6.tdf                    ; Project Directory  ; work    ; 59a503d72682bab2b35ee02dd426a53f ;
; db/alt_synch_pipe_hc8.tdf                   ; Project Directory  ; work    ; f3775c9c533d0faec4070281358a376e ;
; db/alt_synch_pipe_ic8.tdf                   ; Project Directory  ; work    ; 69ed181ce4b8a8a9e8022ed463b145f0 ;
; db/alt_synch_pipe_jc8.tdf                   ; Project Directory  ; work    ; ab60c8e9ddf6b360bd0d0629dd05a386 ;
; db/alt_synch_pipe_kc8.tdf                   ; Project Directory  ; work    ; 301d2865495195927f7b3d58a9c184da ;
; db/altsyncram_70s1.tdf                      ; Project Directory  ; work    ; 2f58785a21bb98cbc5520375f0782235 ;
; db/cmpr_tn5.tdf                             ; Project Directory  ; work    ; dbb3955d6edd0a22ed320f747b8735da ;
; db/cmpr_un5.tdf                             ; Project Directory  ; work    ; 1ec6fc0ce9d8d29a241b4c38f03683b9 ;
; db/cntr_i9b.tdf                             ; Project Directory  ; work    ; f042dca974296be5dc123c80079027fe ;
; db/cntr_u97.tdf                             ; Project Directory  ; work    ; 01a638ec057494c89352fef6a8523d88 ;
; db/dcfifo_abv1.tdf                          ; Project Directory  ; work    ; 37c3ae439e53e4f7d7b77b8cfdd4d29a ;
; db/dcfifo_ohv1.tdf                          ; Project Directory  ; work    ; 18de5cde8d104e1c9dd0ac7725da1bf9 ;
; db/dffpipe_ad9.tdf                          ; Project Directory  ; work    ; 744778efc826f2c3c29197121c5c1634 ;
; db/dffpipe_bd9.tdf                          ; Project Directory  ; work    ; 709eefff5f0ed9da6c2680e5cb8498e7 ;
; db/dffpipe_cd9.tdf                          ; Project Directory  ; work    ; c32ee69b90dc2e3c8bb02d5e0367d81f ;
; db/dffpipe_dd9.tdf                          ; Project Directory  ; work    ; 38cce7dfacc534be68a54a2ea781ccb2 ;
; db/dffpipe_jd9.tdf                          ; Project Directory  ; work    ; a1ea6bd6c01f0b06872cea1a2b87acfd ;
; db/dffpipe_kd9.tdf                          ; Project Directory  ; work    ; 291d0e67af9e30fa791e69f159e851a8 ;
; db/dpram_kgb1.tdf                           ; Project Directory  ; work    ; 3b0ad0594ab4b840c74a79f2e8ec4382 ;
; db/dpram_mm91.tdf                           ; Project Directory  ; work    ; b0e0e45566f320263bf5916d75984a43 ;
; db/dpram_tm91.tdf                           ; Project Directory  ; work    ; 2f8b00183eff3b50cfae5787f7b34828 ;
; db/scfifo_q3h1.tdf                          ; Project Directory  ; work    ; 9998ebc5ebde601fc04bcd63ea40c49a ;
; ../src/AID_AIDA.vhd                         ; Project Directory  ; work    ; 93b9aefe0aa7d4203ce20a72a899579a ;
; ../src/AID_AIDA_L0.vhd                      ; Project Directory  ; work    ; 7d198f03de31de0adea9779e7ce82060 ;
; ../src/AID_AIDA_L1.vhd                      ; Project Directory  ; work    ; 4838f960298093b9046a26c80f87a1e7 ;
; ../src/AID_L0_FIFO.vhd                      ; Project Directory  ; work    ; 0b8b5dfd20e54ce06e5c2e2b9eb36a0c ;
; ../src/AID_L0_FIFO_PERIOD.vhd               ; Project Directory  ; work    ; c450eea91a64dd118b7e18f9f6fbe1b3 ;
; ../src/AID_L0_TC_WRAPPER.vhd                ; Project Directory  ; work    ; db1bf6c8158c9d97a49d5c08cafa116b ;
; ../src/AID_L0_TRIG_DELAY.vhd                ; Project Directory  ; work    ; a603fcb35603c4cae71634aa00fd3de7 ;
; ../src/AID_L0_TRIGCOUNTERS.vhd              ; Project Directory  ; work    ; 00319a9b4e38bc46ad31d0bd9a059024 ;
; ../src/AID_L1_HIT_FIFO.vhd                  ; Project Directory  ; work    ; 1ebfd19790bffaefa02c64dc6b633213 ;
; ../src/AID_L1_SM.vhd                        ; Project Directory  ; work    ; a5a6783fa84346c43f367075b6705f67 ;
; ../src/AID_L1_SM_READER.vhd                 ; Project Directory  ; work    ; 0a9163d9edc6adea92c630d00b18c1d4 ;
; ../src/AID_L1_TC_SM.vhd                     ; Project Directory  ; work    ; e13b69b8602774f1996bca58f3738211 ;
; ../src/AID_L1_TC_WRAPPER.vhd                ; Project Directory  ; work    ; 2f04c25d4feb5fc108fb3058d4ccab93 ;
+---------------------------------------------+--------------------+---------+----------------------------------+


+-----------------------------------------------------------------------------------+
; Post-Synthesis Netlist Statistics for Partition AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER ;
+-----------------------+-----------------------------------------------------------+
; Type                  ; Count                                                     ;
+-----------------------+-----------------------------------------------------------+
; arriav_ff             ; 18679                                                     ;
;     CLR               ; 5335                                                      ;
;     CLR SCLR          ; 36                                                        ;
;     CLR SCLR SLD      ; 216                                                       ;
;     CLR SLD           ; 40                                                        ;
;     ENA CLR           ; 3018                                                      ;
;     ENA CLR SCLR      ; 1171                                                      ;
;     SLD               ; 768                                                       ;
;     plain             ; 8095                                                      ;
; arriav_lcell_comb     ; 9030                                                      ;
;     arith             ; 1376                                                      ;
;         1 data inputs ; 1352                                                      ;
;         2 data inputs ; 24                                                        ;
;     extend            ; 1                                                         ;
;         7 data inputs ; 1                                                         ;
;     normal            ; 7653                                                      ;
;         0 data inputs ; 1                                                         ;
;         1 data inputs ; 512                                                       ;
;         2 data inputs ; 1075                                                      ;
;         3 data inputs ; 1442                                                      ;
;         4 data inputs ; 1121                                                      ;
;         5 data inputs ; 720                                                       ;
;         6 data inputs ; 2782                                                      ;
; arriav_mlab_cell      ; 1749                                                      ;
; boundary_port         ; 1343                                                      ;
; stratixv_ram_block    ; 384                                                       ;
;                       ;                                                           ;
; Max LUT depth         ; 8.00                                                      ;
; Average LUT depth     ; 1.60                                                      ;
+-----------------------+-----------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2a"                                  ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Port         ; Type   ; Severity ; Details                                                                             ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; almost_empty ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h"                                  ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; Port         ; Type   ; Severity ; Details                                                                             ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+
; almost_empty ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER"                                                                              ;
+----------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                             ; Type   ; Severity ; Details                                                                             ;
+----------------------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_sid[1]                         ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_timeout                        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_trigger_tag                    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_spill_av_g                     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_trig_av_g                      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_ext_spill_g                    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_trig_time_res_pulse_g          ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_spill_time_res_pulse_g         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_spill_time_g                   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_trig_time_g                    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_l3_sm_trig_av_g                ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_l3_sm_spill_av_g               ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_l3_sm_trig_trailed_g           ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_l3_sm_readout_on_spill_start_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_l3_sm_state_g                  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------------------+--------+----------+-------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+-------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                 ;
+-------------------+-------+----------+-------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                            ;
; x_position[30..4] ; Input ; Info     ; Stuck at GND                                                            ;
; x_position[3]     ; Input ; Info     ; Stuck at VCC                                                            ;
; x_position[2]     ; Input ; Info     ; Stuck at GND                                                            ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                            ;
+-------------------+-------+----------+-------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER" ;
+----------------+-------+----------+-----------------------------------------------------------------------------+
; Port           ; Type  ; Severity ; Details                                                                     ;
+----------------+-------+----------+-----------------------------------------------------------------------------+
; x_position     ; Input ; Info     ; Stuck at GND                                                                ;
; x_fifo_wr_full ; Input ; Info     ; Stuck at GND                                                                ;
+----------------+-------+----------+-----------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:10:C_RX" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                          ;
+-------------------+-------+----------+----------------------------------------------------------------------------------+
; x_position[30..4] ; Input ; Info     ; Stuck at GND                                                                     ;
; x_position[3]     ; Input ; Info     ; Stuck at VCC                                                                     ;
; x_position[2]     ; Input ; Info     ; Stuck at GND                                                                     ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                     ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                     ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                     ;
+-------------------+-------+----------+----------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:9:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[30..4] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[2..1]  ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[3]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:8:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[30..4] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[2..0]  ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[3]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:7:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                         ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                    ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                    ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                    ;
+-------------------+-------+----------+---------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM"                                               ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                             ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_clk100            ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_fifo_l2_error     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifo_l2_error_clr ; Input  ; Info     ; Stuck at GND                                                                        ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+-----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                       ;
+-------------------+-------+----------+-----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                  ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                  ;
+-------------------+-------+----------+-----------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                               ;
+------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                          ;
+------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+-----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                       ;
+-------------------+-------+----------+-----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                  ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                  ;
+-------------------+-------+----------+-----------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                               ;
+------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                          ;
+------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                               ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                          ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                          ;
+-------------------+-------+----------+-------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                      ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                 ;
+-------------------+-------+----------+----------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:C_FIRST_READER" ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port       ; Type  ; Severity ; Details                                                                                              ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position ; Input ; Info     ; Stuck at GND                                                                                         ;
+------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                                              ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                                         ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                                         ;
+-------------------+-------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC"     ;
+-----------------+--------+----------+-------------------------------------------------------------------------------------+
; Port            ; Type   ; Severity ; Details                                                                             ;
+-----------------+--------+----------+-------------------------------------------------------------------------------------+
; x_tag_counter_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_counter_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+-----------------+--------+----------+-------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER"                                                                                                               ;
+----------------------------+------------------+----------+------------------------------------------------------------------------------------------------------------------+
; Port                       ; Type             ; Severity ; Details                                                                                                          ;
+----------------------------+------------------+----------+------------------------------------------------------------------------------------------------------------------+
; x_fifo_l0c_rd              ; Partition Input  ; Warning  ; Stuck at GND. Constants will not propagate across partition boundaries                                           ;
; x_fifo_l0c_rd_data         ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_fifo_l0c_rd_empty        ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_fifo_l0c_rd_almost_empty ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_trig_delay_g             ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_l0h_wr_g                 ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_l0h_wr_full_g            ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_fifo_l0h_error400_g      ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_error_clr400_g           ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_l0c_wr_g                 ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_l0h_rd_g                 ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_l0h_rd_empty_g           ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
; x_l1_wr_g                  ; Partition Output ; Warning  ; Connected to dangling logic. Logic connected to a dangling partition output or bidir will not be optimized away. ;
+----------------------------+------------------+----------+------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_RX" ;
+---------+--------+----------+----------------------------------------------------------------------------------------------------------------+
; Port    ; Type   ; Severity ; Details                                                                                                        ;
+---------+--------+----------+----------------------------------------------------------------------------------------------------------------+
; wrusedw ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                            ;
+---------+--------+----------+----------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_deser:C_DESER" ;
+------------------+--------+----------+------------------------------------------------------------------------------------------------------------------+
; Port             ; Type   ; Severity ; Details                                                                                                          ;
+------------------+--------+----------+------------------------------------------------------------------------------------------------------------------+
; x_rd             ; Input  ; Info     ; Stuck at VCC                                                                                                     ;
; x_overrun_err    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_state_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_shift_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_count_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_clk_count_g    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_start_detect_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_parity_calc_g  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_parity_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
; x_clkpulse_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                              ;
+------------------+--------+----------+------------------------------------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_ser:C_SER" ;
+-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------+
; Port        ; Type   ; Severity ; Details                                                                                                           ;
+-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------+
; x_ready     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_state_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_parity_g  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_shift_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_tx_done_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
+-------------+--------+----------+-------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN" ;
+---------------+--------+----------+---------------------------------------------------------------------------------------------------------------------+
; Port          ; Type   ; Severity ; Details                                                                                                             ;
+---------------+--------+----------+---------------------------------------------------------------------------------------------------------------------+
; x_counter16_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                 ;
; x_counter_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                 ;
+---------------+--------+----------+---------------------------------------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART"                                             ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                             ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_baudrate16[7..6]  ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_baudrate16[3..1]  ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_baudrate16[5..4]  ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_baudrate16[0]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_parity_en         ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_parity_odd        ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_fifotx_wr_full    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_wr_usedw   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_error             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_error_clr         ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_flush             ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_pulse16_out_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_wr_req_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_wr_full_g  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_rd_req_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_rd_empty_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY"                                      ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port               ; Type   ; Severity ; Details                                                                             ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_sel_user_set_cmd ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_user_set_cmd     ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_busy             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_tx_cnt_g         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_timeout_cnt_g    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_frame_cnt_g      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_hv_group_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET" ;
+--------------------+-------+----------+-------------------------------------------------------+
; Port               ; Type  ; Severity ; Details                                               ;
+--------------------+-------+----------+-------------------------------------------------------+
; x_sel_user_get_cmd ; Input ; Info     ; Stuck at GND                                          ;
+--------------------+-------+----------+-------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET"                                ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port               ; Type   ; Severity ; Details                                                                             ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_sel_user_set_cmd ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_user_set_cmd     ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_busy             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+--------------------+--------+----------+-------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_HVONSLOWCONTROL:C_HVON"                                                                ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; Port           ; Type   ; Severity ; Details                                                                             ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+
; x_9600bd_pulse ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_hvon_reg_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_data_av_g    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_rd_g  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_wr_g  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL"                                                                ;
+---------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                      ; Type   ; Severity ; Details                                                                             ;
+---------------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_scc_registers[607..602] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_scc_registers[387..369] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_scc_registers[352..347] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_scc_registers[313..299] ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_scc_registers[342]      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------------------------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L2_FIFO:C_FIFO_L2"                                                                 ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; Port    ; Type   ; Severity ; Details                                                                             ;
+---------+--------+----------+-------------------------------------------------------------------------------------+
; rdusedw ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_LAST_READER" ;
+-------------------+-------+----------+----------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                              ;
+-------------------+-------+----------+----------------------------------------------------------------------+
; x_position[2..0]  ; Input ; Info     ; Stuck at VCC                                                         ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                         ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                         ;
+-------------------+-------+----------+----------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:C_FIRST_READER" ;
+----------------+-------+----------+--------------------------------------------------------------------------+
; Port           ; Type  ; Severity ; Details                                                                  ;
+----------------+-------+----------+--------------------------------------------------------------------------+
; x_position     ; Input ; Info     ; Stuck at GND                                                             ;
; x_fifo_wr_full ; Input ; Info     ; Stuck at GND                                                             ;
+----------------+-------+----------+--------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:6:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                      ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; x_position[2..1]  ; Input ; Info     ; Stuck at VCC                                                                 ;
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                 ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                 ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                 ;
+-------------------+-------+----------+------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:5:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                      ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                 ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                 ;
; x_position[1]     ; Input ; Info     ; Stuck at GND                                                                 ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                 ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                 ;
+-------------------+-------+----------+------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:4:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                      ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; x_position[30..3] ; Input ; Info     ; Stuck at GND                                                                 ;
; x_position[1..0]  ; Input ; Info     ; Stuck at GND                                                                 ;
; x_position[2]     ; Input ; Info     ; Stuck at VCC                                                                 ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                 ;
+-------------------+-------+----------+------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:3:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                      ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; x_position[1..0]  ; Input ; Info     ; Stuck at VCC                                                                 ;
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                 ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                 ;
+-------------------+-------+----------+------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:2:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                      ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; x_position[30..2] ; Input ; Info     ; Stuck at GND                                                                 ;
; x_position[1]     ; Input ; Info     ; Stuck at VCC                                                                 ;
; x_position[0]     ; Input ; Info     ; Stuck at GND                                                                 ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                 ;
+-------------------+-------+----------+------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX" ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; Port              ; Type  ; Severity ; Details                                                                      ;
+-------------------+-------+----------+------------------------------------------------------------------------------+
; x_position[30..1] ; Input ; Info     ; Stuck at GND                                                                 ;
; x_position[0]     ; Input ; Info     ; Stuck at VCC                                                                 ;
; x_fifo_wr_full    ; Input ; Info     ; Stuck at GND                                                                 ;
+-------------------+-------+----------+------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM"                                                  ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                             ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_fifo_l2_error     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifo_l2_error_clr ; Input  ; Info     ; Stuck at GND                                                                        ;
+---------------------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|USB_UC_PCLK:C_ADC_CLK" ;
+----------+-------+----------+-------------------------------------------------------------------------------------+
; Port     ; Type  ; Severity ; Details                                                                             ;
+----------+-------+----------+-------------------------------------------------------------------------------------+
; datain_h ; Input ; Info     ; Stuck at GND                                                                        ;
; datain_l ; Input ; Info     ; Stuck at VCC                                                                        ;
+----------+-------+----------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM"      ;
+---------------+--------+----------+-------------------------------------------------------------------------------------+
; Port          ; Type   ; Severity ; Details                                                                             ;
+---------------+--------+----------+-------------------------------------------------------------------------------------+
; x_hit_latch_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_hit_shift_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_limit_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+---------------+--------+----------+-------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver" ;
+-------------+--------+----------+------------------------------------------------------------------------------------------+
; Port        ; Type   ; Severity ; Details                                                                                  ;
+-------------+--------+----------+------------------------------------------------------------------------------------------+
; x_data_av   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.      ;
; x_counter_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.      ;
+-------------+--------+----------+------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:7:C_THRESHOLD_SMX" ;
+------------------------+--------+----------+------------------------------------------------------------------------------------------------------+
; Port                   ; Type   ; Severity ; Details                                                                                              ;
+------------------------+--------+----------+------------------------------------------------------------------------------------------------------+
; x_asic                 ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_hit                  ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_channel[4..3]        ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_channel[1..0]        ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_channel[2]           ; Input  ; Info     ; Stuck at VCC                                                                                         ;
; x_filter_wrin          ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_channel_wr    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_d_wr          ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_channel_rd    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_d_rd          ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_scc_thd              ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_scc_ch_enable[31..1] ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_scc_compute_out      ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_latched_hit_id       ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_baseline_ch_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
+------------------------+--------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:6:C_THRESHOLD_SMX" ;
+------------------------+--------+----------+------------------------------------------------------------------------------------------------------+
; Port                   ; Type   ; Severity ; Details                                                                                              ;
+------------------------+--------+----------+------------------------------------------------------------------------------------------------------+
; x_asic                 ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_hit                  ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_channel[4..2]        ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_filter_wrin          ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_channel_wr    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_d_wr          ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_channel_rd    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
; x_filter_d_rd          ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_scc_thd              ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_scc_ch_enable[31..3] ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_scc_compute_out      ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_latched_hit_id       ; Input  ; Info     ; Stuck at GND                                                                                         ;
; x_baseline_ch_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                  ;
+------------------------+--------+----------+------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:5:C_THRESHOLD_SMX" ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                                                 ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; x_asic[1]           ; Input  ; Info     ; Stuck at VCC                                                                                            ;
; x_asic[0]           ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_filter_wrin       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_wr ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_wr       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_rd ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_rd       ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_baseline_ch_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:4:C_THRESHOLD_SMX" ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                                                 ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; x_asic[1]           ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_asic[0]           ; Input  ; Info     ; Stuck at VCC                                                                                            ;
; x_filter_wrin       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_wr ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_wr       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_rd ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_rd       ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_baseline_ch_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:3:C_THRESHOLD_SMX" ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                                                 ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; x_asic              ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_filter_wrin       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_wr ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_wr       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_rd ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_rd       ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_baseline_ch_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:2:C_THRESHOLD_SMX" ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                                                 ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; x_asic[1]           ; Input  ; Info     ; Stuck at VCC                                                                                            ;
; x_asic[0]           ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_filter_wrin       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_wr ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_wr       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_rd ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_rd       ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_baseline_ch_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:1:C_THRESHOLD_SMX" ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                                                 ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; x_asic[1]           ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_asic[0]           ; Input  ; Info     ; Stuck at VCC                                                                                            ;
; x_filter_wrin       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_wr ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_wr       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_rd ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_rd       ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_baseline_ch_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX" ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; Port                ; Type   ; Severity ; Details                                                                                                 ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+
; x_asic              ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_filter_wrin       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_wr ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_wr       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_channel_rd ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
; x_filter_d_rd       ; Input  ; Info     ; Stuck at GND                                                                                            ;
; x_baseline_ch_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                     ;
+---------------------+--------+----------+---------------------------------------------------------------------------------------------------------+


+--------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "AID_L3_AC_WRAPPER:C_AC_WRAPPER"                                                                     ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                 ; Type   ; Severity ; Details                                                                             ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_adc_data_av_prev_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_adc_counter_g      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifo_l1_wr_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifo_l1_full_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_tsm_hg_wrout_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_tsm_ch_g           ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+----------------------+--------+----------+-------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER" ;
+------------------+--------+----------+-------------------------------------------------------------------------------------------------------------------+
; Port             ; Type   ; Severity ; Details                                                                                                           ;
+------------------+--------+----------+-------------------------------------------------------------------------------------------------------------------+
; x_rd             ; Input  ; Info     ; Stuck at VCC                                                                                                      ;
; x_overrun_err    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_state_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_shift_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_count_g        ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_clk_count_g    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_start_detect_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_parity_calc_g  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_parity_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
; x_clkpulse_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                               ;
+------------------+--------+----------+-------------------------------------------------------------------------------------------------------------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER" ;
+-------------+--------+----------+--------------------------------------------------------------------------------------------------------------------+
; Port        ; Type   ; Severity ; Details                                                                                                            ;
+-------------+--------+----------+--------------------------------------------------------------------------------------------------------------------+
; x_ready     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                ;
; x_state_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                ;
; x_parity_g  ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                ;
; x_shift_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                ;
; x_tx_done_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                ;
+-------------+--------+----------+--------------------------------------------------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN" ;
+---------------+--------+----------+----------------------------------------------------------------------------------------------------------------------+
; Port          ; Type   ; Severity ; Details                                                                                                              ;
+---------------+--------+----------+----------------------------------------------------------------------------------------------------------------------+
; x_counter16_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                  ;
; x_counter_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed.                                  ;
+---------------+--------+----------+----------------------------------------------------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART"                                    ;
+-----------------+--------+----------+-------------------------------------------------------------------------------------+
; Port            ; Type   ; Severity ; Details                                                                             ;
+-----------------+--------+----------+-------------------------------------------------------------------------------------+
; x_baudrate16    ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_parity_en     ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_parity_odd    ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_error         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_error_clr     ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_flush         ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_pulse_out_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_pulse16_out_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+-----------------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER" ;
+-------------------------+-------+----------+----------------------------------------------+
; Port                    ; Type  ; Severity ; Details                                      ;
+-------------------------+-------+----------+----------------------------------------------+
; x_lib_fw_version[1..0]  ; Input ; Info     ; Stuck at VCC                                 ;
; x_lib_fw_version[15..2] ; Input ; Info     ; Stuck at GND                                 ;
+-------------------------+-------+----------+----------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC" ;
+-----------------------+-------+----------+----------------------------------------------------------------------+
; Port                  ; Type  ; Severity ; Details                                                              ;
+-----------------------+-------+----------+----------------------------------------------------------------------+
; x_crc_init            ; Input ; Info     ; Stuck at VCC                                                         ;
; x_crc_final           ; Input ; Info     ; Stuck at GND                                                         ;
; x_crc_din_msb_1st     ; Input ; Info     ; Stuck at GND                                                         ;
; x_crc_reflect_crc_din ; Input ; Info     ; Stuck at VCC                                                         ;
; x_crc_reflect_crc     ; Input ; Info     ; Stuck at GND                                                         ;
+-----------------------+-------+----------+----------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK" ;
+----------+-------+----------+-----------------------------------------------------------------------------+
; Port     ; Type  ; Severity ; Details                                                                     ;
+----------+-------+----------+-----------------------------------------------------------------------------+
; datain_h ; Input ; Info     ; Stuck at GND                                                                ;
; datain_l ; Input ; Info     ; Stuck at VCC                                                                ;
+----------+-------+----------+-----------------------------------------------------------------------------+


+----------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB"                                  ;
+------------+--------+----------+-------------------------------------------------------------------------------------+
; Port       ; Type   ; Severity ; Details                                                                             ;
+------------+--------+----------+-------------------------------------------------------------------------------------+
; x_zlp_rq_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+------------+--------+----------+-------------------------------------------------------------------------------------+


+-----------------------------------------------------------------------------------------------------------------------------------+
; Port Connectivity Checks: "UFP_WRAPPER_USB_UART:C_WRAPPER_USB"                                                                    ;
+-------------------------+--------+----------+-------------------------------------------------------------------------------------+
; Port                    ; Type   ; Severity ; Details                                                                             ;
+-------------------------+--------+----------+-------------------------------------------------------------------------------------+
; x_uart_tx_en            ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_status[15..13]        ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_status[5..4]          ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_fw_version[15..7]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_fw_version[5..0]      ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_fw_version[6]         ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_hw_version            ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_product_id[1..0]      ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_product_id[15..2]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_device_load_error[3]  ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_user_set_req[7..3]    ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_user_set_ack[7..3]    ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_user_set_error[7..3]  ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_user_set_error[0]     ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_user_set_cmd_req      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_user_set_cmd          ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_user_set_cmd_ack      ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_user_set_cmd_error    ; Input  ; Info     ; Stuck at VCC                                                                        ;
; x_user_set_cmd_error_d  ; Input  ; Info     ; Stuck at GND                                                                        ;
; x_user_get_cmd[15..4]   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_state_g               ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_wr_cnt_g              ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_data_av_g             ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_wr_req_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_wr_full_g      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_rd_req_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_rd_dout_g      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforx_rd_empty_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_rd_req_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_rd_empty_g     ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_wr_req_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_wr_full_g      ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fifotx_wr_din_g       ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforeadout_tx_wr_g   ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_fiforeadout_tx_full_g ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_crc_dout_av_g         ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_crc_dout_g            ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
; x_answer_rq_g           ; Output ; Info     ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ;
+-------------------------+--------+----------+-------------------------------------------------------------------------------------+


+-------------------------------+
; Elapsed Time Per Partition    ;
+----------------+--------------+
; Partition Name ; Elapsed Time ;
+----------------+--------------+
; Top            ; 00:00:18     ;
+----------------+--------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II 64-Bit Analysis & Synthesis
    Info: Version 14.0.0 Build 200 06/17/2014 SJ Full Version
    Info: Processing started: Fri Apr 28 07:33:47 2017
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off AID_AIDA_FEB -c AID_AIDA_FEB
Info (11104): Parallel Compilation has detected 4 hyper-threaded processors. However, the extra hyper-threaded processors will not be used by default. Parallel Compilation will use 2 of the 2 physical processors detected instead.
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/lib/u_util/exp/u_util.vhd
    Info (12022): Found design unit 1: u_util
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/lib/u_util/exp/u_size.vhd
    Info (12022): Found design unit 1: U_Size
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/u_util/src/u_edgepulse.vhd
    Info (12022): Found design unit 1: U_EdgePulse-A_behavioral
    Info (12023): Found entity 1: U_EdgePulse
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/u_util/src/u_onepulse.vhd
    Info (12022): Found design unit 1: U_OnePulse-A_behavioral
    Info (12023): Found entity 1: U_OnePulse
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/usb_usb/c_aria5/src/usb_l2_tx_fifo.vhd
    Info (12022): Found design unit 1: usb_l2_tx_fifo-SYN
    Info (12023): Found entity 1: USB_L2_TX_FIFO
Info (12021): Found 2 design units, including 0 entities, in source file /vhdl_db/trunk/lib/usb_usb/exp/usb_usb.vhd
    Info (12022): Found design unit 1: usb_usb
    Info (12022): Found design unit 2: usb_usb-body
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/usb_usb/c_aria5/src/usb_uc_pclk.vhd
    Info (12022): Found design unit 1: USB_UC_PCLK-SYN
    Info (12023): Found entity 1: USB_UC_PCLK
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/usb_usb/src/usb_usb_reader.vhd
    Info (12022): Found design unit 1: USB_USB_Reader-Behavioral
    Info (12023): Found entity 1: USB_USB_Reader
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/exp/ser_serialcommunication.vhd
    Info (12022): Found design unit 1: ser_serialCommunication
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/exp/ser_crc_pck.vhd
    Info (12022): Found design unit 1: ser_crc_pck
Info (12021): Found 2 design units, including 0 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_crc_pck_polynomial.vhd
    Info (12022): Found design unit 1: ser_crc_pck_polynomial
    Info (12022): Found design unit 2: ser_crc_pck_polynomial-body
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_crc.vhd
    Info (12022): Found design unit 1: ser_crc-A_Behavioral
    Info (12023): Found entity 1: ser_crc
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/crc_pol/ser_crc_pol16_din16_d4_1a2eb.vhd
    Info (12022): Found design unit 1: ser_crc_pol16_DIN16_D4_1a2eb-A_Behavioral
    Info (12023): Found entity 1: ser_crc_pol16_DIN16_D4_1a2eb
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_uart_ser.vhd
    Info (12022): Found design unit 1: ser_uart_ser-A_Behavioral
    Info (12023): Found entity 1: ser_uart_ser
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_uart_deser.vhd
    Info (12022): Found design unit 1: ser_uart_deser-A_Behavioral
    Info (12023): Found entity 1: ser_uart_deser
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_data_5_bits_filter.vhd
    Info (12022): Found design unit 1: ser_data_5_bits_filter-A_Behavioral
    Info (12023): Found entity 1: ser_data_5_bits_filter
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_uart_bdgen.vhd
    Info (12022): Found design unit 1: ser_uart_bdgen-A_Behavioral
    Info (12023): Found entity 1: ser_uart_bdgen
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_uart.vhd
    Info (12022): Found design unit 1: ser_uart-A_Behavioral
    Info (12023): Found entity 1: ser_uart
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_uart_wrapper.vhd
    Info (12022): Found design unit 1: ser_uart_wrapper-A_Behavioral
    Info (12023): Found entity 1: ser_uart_wrapper
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_uart_wrapper32.vhd
    Info (12022): Found design unit 1: ser_uart_wrapper32-A_Behavioral
    Info (12023): Found entity 1: ser_uart_wrapper32
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/src/ser_uart_wrapper8_d4.vhd
    Info (12022): Found design unit 1: ser_uart_wrapper8_d4-A_Behavioral
    Info (12023): Found entity 1: ser_uart_wrapper8_d4
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/c_aria5/src/ser_uart_fifo_tx32.vhd
    Info (12022): Found design unit 1: ser_uart_fifo_tx32-SYN
    Info (12023): Found entity 1: SER_UART_FIFO_TX32
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/c_aria5/src/ser_uart_fifo_rx32.vhd
    Info (12022): Found design unit 1: ser_uart_fifo_rx32-SYN
    Info (12023): Found entity 1: SER_UART_FIFO_RX32
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ser_serialcommunication/c_aria5/src/ser_uart_fifo8_d4.vhd
    Info (12022): Found design unit 1: ser_uart_fifo8_d4-SYN
    Info (12023): Found entity 1: SER_UART_FIFO8_D4
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/exp/ufp_usbfrontendprotocol.vhd
    Info (12022): Found design unit 1: UFP_UsbFrontEndProtocol
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/exp/ufp_fw_version.vhd
    Info (12022): Found design unit 1: UFP_fw_version
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/src/ufp_decoder.vhd
    Info (12022): Found design unit 1: UFP_DECODER-Behavioral
    Info (12023): Found entity 1: UFP_DECODER
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/src/ufp_encoder_uart.vhd
    Info (12022): Found design unit 1: UFP_ENCODER_UART-Behavioral
    Info (12023): Found entity 1: UFP_ENCODER_UART
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/src/ufp_wrapper_usb_uart.vhd
    Info (12022): Found design unit 1: UFP_WRAPPER_USB_UART-Behavioral
    Info (12023): Found entity 1: UFP_WRAPPER_USB_UART
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/src/ufp_user_get_config.vhd
    Info (12022): Found design unit 1: UFP_USER_GET_CONFIG-Behavioral
    Info (12023): Found entity 1: UFP_USER_GET_CONFIG
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/src/ufp_user_set_config.vhd
    Info (12022): Found design unit 1: UFP_USER_SET_CONFIG-Behavioral
    Info (12023): Found entity 1: UFP_USER_SET_CONFIG
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/lib/ufp_usbfrontendprotocol/src/ufp_user_setget_ack.vhd
    Info (12022): Found design unit 1: UFP_USER_SETGET_ACK-Behavioral
    Info (12023): Found entity 1: UFP_USER_SETGET_ACK
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_pll3.vhd
    Info (12022): Found design unit 1: AID_pll3-rtl
    Info (12023): Found entity 1: AID_pll3
Info (12021): Found 1 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_pll3/aid_pll3_0002.v
    Info (12023): Found entity 1: AID_pll3_0002
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l0_fifo.vhd
    Info (12022): Found design unit 1: aid_l0_fifo-SYN
    Info (12023): Found entity 1: AID_L0_FIFO
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l0_fifo_period.vhd
    Info (12022): Found design unit 1: aid_l0_fifo_period-SYN
    Info (12023): Found entity 1: AID_L0_FIFO_PERIOD
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l0_trig_delay.vhd
    Info (12022): Found design unit 1: aid_l0_trig_delay-SYN
    Info (12023): Found entity 1: AID_L0_TRIG_DELAY
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l0_trigcounters.vhd
    Info (12022): Found design unit 1: AID_L0_TrigCounters-Behavioral
    Info (12023): Found entity 1: AID_L0_TrigCounters
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l0_tc_wrapper.vhd
    Info (12022): Found design unit 1: AID_L0_TC_WRAPPER-Behavioral
    Info (12023): Found entity 1: AID_L0_TC_WRAPPER
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_hold_manager.vhd
    Info (12022): Found design unit 1: AID_L1_Hold_Manager-Behavioral
    Info (12023): Found entity 1: AID_L1_Hold_Manager
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_adc_ddr.vhd
    Info (12022): Found design unit 1: aid_l1_adc_ddr-SYN
    Info (12023): Found entity 1: AID_L1_ADC_DDR
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_adc_driver.vhd
    Info (12022): Found design unit 1: AID_L1_ADC_Driver-Behavioral
    Info (12023): Found entity 1: AID_L1_ADC_Driver
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_adc_sm.vhd
    Info (12022): Found design unit 1: AID_L1_ADC_SM-Behavioral
    Info (12023): Found entity 1: AID_L1_ADC_SM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_threshold_sm.vhd
    Info (12022): Found design unit 1: AID_L1_Threshold_SM-Behavioral
    Info (12023): Found entity 1: AID_L1_Threshold_SM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_sm_reader.vhd
    Info (12022): Found design unit 1: AID_L1_SM_READER-Behavioral
    Info (12023): Found entity 1: AID_L1_SM_READER
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_counters.vhd
    Info (12022): Found design unit 1: AID_L1_Counters-Behavioral
    Info (12023): Found entity 1: AID_L1_Counters
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_tc_sm.vhd
    Info (12022): Found design unit 1: AID_L1_TC_SM-Behavioral
    Info (12023): Found entity 1: AID_L1_TC_SM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_sm.vhd
    Info (12022): Found design unit 1: AID_L1_SM-Behavioral
    Info (12023): Found entity 1: AID_L1_SM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_tc_wrapper.vhd
    Info (12022): Found design unit 1: AID_L1_TC_WRAPPER-Behavioral
    Info (12023): Found entity 1: AID_L1_TC_WRAPPER
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_fifo.vhd
    Info (12022): Found design unit 1: aid_l1_fifo-SYN
    Info (12023): Found entity 1: AID_L1_FIFO
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_hit_fifo.vhd
    Info (12022): Found design unit 1: aid_l1_hit_fifo-SYN
    Info (12023): Found entity 1: AID_L1_HIT_FIFO
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_fifo_other.vhd
    Info (12022): Found design unit 1: aid_l1_fifo_other-SYN
    Info (12023): Found entity 1: AID_L1_FIFO_OTHER
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l1_filter_dpram.vhd
    Info (12022): Found design unit 1: aid_l1_filter_dpram-SYN
    Info (12023): Found entity 1: AID_L1_FILTER_DPRAM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2i_fifo.vhd
    Info (12022): Found design unit 1: aid_l2i_fifo-SYN
    Info (12023): Found entity 1: AID_L2i_FIFO
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_dpram.vhd
    Info (12022): Found design unit 1: aid_l2_dpram-SYN
    Info (12023): Found entity 1: AID_L2_DPRAM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_fifo.vhd
    Info (12022): Found design unit 1: aid_l2_fifo-SYN
    Info (12023): Found entity 1: AID_L2_FIFO
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_adc_init.vhd
    Info (12022): Found design unit 1: AID_L2_ADC_INIT-Behavioral
    Info (12023): Found entity 1: AID_L2_ADC_INIT
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_asicslowcontrol.vhd
    Info (12022): Found design unit 1: AID_L2_ASICSLOWCONTROL-Behavioral
    Info (12023): Found entity 1: AID_L2_ASICSLOWCONTROL
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_asicprobecontrol.vhd
    Info (12022): Found design unit 1: AID_L2_ASICPROBECONTROL-Behavioral
    Info (12023): Found entity 1: AID_L2_ASICPROBECONTROL
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_fpgaslowcontrol.vhd
    Info (12022): Found design unit 1: AID_L2_FPGASLOWCONTROL-Behavioral
    Info (12023): Found entity 1: AID_L2_FPGASLOWCONTROL
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_hvonapply.vhd
    Info (12022): Found design unit 1: AID_L2_HVONAPPLY-Behavioral
    Info (12023): Found entity 1: AID_L2_HVONAPPLY
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l2_hvonslowcontrol.vhd
    Info (12022): Found design unit 1: AID_L2_HVONSLOWCONTROL-Behavioral
    Info (12023): Found entity 1: AID_L2_HVONSLOWCONTROL
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l3_wrapper_adc.vhd
    Info (12022): Found design unit 1: AID_L3_WRAPPER_ADC-Behavioral
    Info (12023): Found entity 1: AID_L3_WRAPPER_ADC
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l3_wrapper_tsm.vhd
    Info (12022): Found design unit 1: AID_L3_WRAPPER_TSM-Behavioral
    Info (12023): Found entity 1: AID_L3_WRAPPER_TSM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l3_ac_wrapper.vhd
    Info (12022): Found design unit 1: AID_L3_AC_WRAPPER-Behavioral
    Info (12023): Found entity 1: AID_L3_AC_WRAPPER
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l3_sm.vhd
    Info (12022): Found design unit 1: AID_L3_SM-Behavioral
    Info (12023): Found entity 1: AID_L3_SM
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_l3_sm_wrapper.vhd
    Info (12022): Found design unit 1: AID_L3_SM_WRAPPER-Behavioral
    Info (12023): Found entity 1: AID_L3_SM_WRAPPER
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_aida.vhd
    Info (12022): Found design unit 1: aid_aida
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_aida_l0.vhd
    Info (12022): Found design unit 1: aid_aida_l0
Info (12021): Found 2 design units, including 0 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_aida_l1.vhd
    Info (12022): Found design unit 1: AID_AIDA_L1
    Info (12022): Found design unit 2: AID_AIDA_L1-body
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_aida_l2.vhd
    Info (12022): Found design unit 1: aid_aida_l2
Info (12021): Found 1 design units, including 0 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_aida_l3.vhd
    Info (12022): Found design unit 1: aid_aida_l3
Info (12021): Found 2 design units, including 1 entities, in source file /vhdl_db/trunk/projets/aid_aida_feb/src/aid_aida_feb_v2.vhd
    Info (12022): Found design unit 1: AID_AIDA_FEB-Behavioral
    Info (12023): Found entity 1: AID_AIDA_FEB
Info (12127): Elaborating entity "AID_AIDA_FEB" for the top level hierarchy
Warning (10036): Verilog HDL or VHDL warning at AID_AIDA_FEB_v2.vhd(302): object "sl_int_FIFO_L2_error_clr" assigned a value but never read
Info (12128): Elaborating entity "AID_pll3" for hierarchy "AID_pll3:C_PLL100M"
Info (12128): Elaborating entity "AID_pll3_0002" for hierarchy "AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst"
Info (12128): Elaborating entity "altera_pll" for hierarchy "AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst|altera_pll:altera_pll_i"
Info (10008): Verilog HDL or VHDL information: EDA Netlist Writer cannot regroup multidimensional array "wire_to_nowhere_64" into its bus
Info (12130): Elaborated megafunction instantiation "AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst|altera_pll:altera_pll_i"
Info (12133): Instantiated megafunction "AID_pll3:C_PLL100M|AID_pll3_0002:aid_pll3_inst|altera_pll:altera_pll_i" with the following parameter:
    Info (12134): Parameter "fractional_vco_multiplier" = "false"
    Info (12134): Parameter "reference_clock_frequency" = "40.0 MHz"
    Info (12134): Parameter "operation_mode" = "normal"
    Info (12134): Parameter "number_of_clocks" = "3"
    Info (12134): Parameter "output_clock_frequency0" = "100.000000 MHz"
    Info (12134): Parameter "phase_shift0" = "0 ps"
    Info (12134): Parameter "duty_cycle0" = "50"
    Info (12134): Parameter "output_clock_frequency1" = "400.000000 MHz"
    Info (12134): Parameter "phase_shift1" = "0 ps"
    Info (12134): Parameter "duty_cycle1" = "50"
    Info (12134): Parameter "output_clock_frequency2" = "32.000000 MHz"
    Info (12134): Parameter "phase_shift2" = "0 ps"
    Info (12134): Parameter "duty_cycle2" = "50"
    Info (12134): Parameter "output_clock_frequency3" = "0 MHz"
    Info (12134): Parameter "phase_shift3" = "0 ps"
    Info (12134): Parameter "duty_cycle3" = "50"
    Info (12134): Parameter "output_clock_frequency4" = "0 MHz"
    Info (12134): Parameter "phase_shift4" = "0 ps"
    Info (12134): Parameter "duty_cycle4" = "50"
    Info (12134): Parameter "output_clock_frequency5" = "0 MHz"
    Info (12134): Parameter "phase_shift5" = "0 ps"
    Info (12134): Parameter "duty_cycle5" = "50"
    Info (12134): Parameter "output_clock_frequency6" = "0 MHz"
    Info (12134): Parameter "phase_shift6" = "0 ps"
    Info (12134): Parameter "duty_cycle6" = "50"
    Info (12134): Parameter "output_clock_frequency7" = "0 MHz"
    Info (12134): Parameter "phase_shift7" = "0 ps"
    Info (12134): Parameter "duty_cycle7" = "50"
    Info (12134): Parameter "output_clock_frequency8" = "0 MHz"
    Info (12134): Parameter "phase_shift8" = "0 ps"
    Info (12134): Parameter "duty_cycle8" = "50"
    Info (12134): Parameter "output_clock_frequency9" = "0 MHz"
    Info (12134): Parameter "phase_shift9" = "0 ps"
    Info (12134): Parameter "duty_cycle9" = "50"
    Info (12134): Parameter "output_clock_frequency10" = "0 MHz"
    Info (12134): Parameter "phase_shift10" = "0 ps"
    Info (12134): Parameter "duty_cycle10" = "50"
    Info (12134): Parameter "output_clock_frequency11" = "0 MHz"
    Info (12134): Parameter "phase_shift11" = "0 ps"
    Info (12134): Parameter "duty_cycle11" = "50"
    Info (12134): Parameter "output_clock_frequency12" = "0 MHz"
    Info (12134): Parameter "phase_shift12" = "0 ps"
    Info (12134): Parameter "duty_cycle12" = "50"
    Info (12134): Parameter "output_clock_frequency13" = "0 MHz"
    Info (12134): Parameter "phase_shift13" = "0 ps"
    Info (12134): Parameter "duty_cycle13" = "50"
    Info (12134): Parameter "output_clock_frequency14" = "0 MHz"
    Info (12134): Parameter "phase_shift14" = "0 ps"
    Info (12134): Parameter "duty_cycle14" = "50"
    Info (12134): Parameter "output_clock_frequency15" = "0 MHz"
    Info (12134): Parameter "phase_shift15" = "0 ps"
    Info (12134): Parameter "duty_cycle15" = "50"
    Info (12134): Parameter "output_clock_frequency16" = "0 MHz"
    Info (12134): Parameter "phase_shift16" = "0 ps"
    Info (12134): Parameter "duty_cycle16" = "50"
    Info (12134): Parameter "output_clock_frequency17" = "0 MHz"
    Info (12134): Parameter "phase_shift17" = "0 ps"
    Info (12134): Parameter "duty_cycle17" = "50"
    Info (12134): Parameter "pll_type" = "General"
    Info (12134): Parameter "pll_subtype" = "General"
Info (12128): Elaborating entity "UFP_WRAPPER_USB_UART" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB"
Info (12128): Elaborating entity "USB_USB_Reader" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB"
Info (12128): Elaborating entity "USB_UC_PCLK" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK"
Info (12128): Elaborating entity "altddio_out" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component"
Info (12130): Elaborated megafunction instantiation "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component"
Info (12133): Instantiated megafunction "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "extend_oe_disable" = "OFF"
    Info (12134): Parameter "invert_output" = "OFF"
    Info (12134): Parameter "oe_reg" = "UNREGISTERED"
    Info (12134): Parameter "power_up_high" = "OFF"
    Info (12134): Parameter "width" = "1"
    Info (12134): Parameter "lpm_hint" = "UNUSED"
    Info (12134): Parameter "lpm_type" = "altddio_out"
Info (12021): Found 1 design units, including 1 entities, in source file db/ddio_out_dri.tdf
    Info (12023): Found entity 1: ddio_out_dri
Info (12128): Elaborating entity "ddio_out_dri" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_USB_Reader:C_USB|USB_UC_PCLK:C_UC_PCLK|altddio_out:ALTDDIO_OUT_component|ddio_out_dri:auto_generated"
Info (12128): Elaborating entity "USB_L2_TX_FIFO" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX"
Info (12128): Elaborating entity "dcfifo" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component"
Info (12130): Elaborated megafunction instantiation "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component"
Info (12133): Instantiated megafunction "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_numwords" = "64"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "dcfifo"
    Info (12134): Parameter "lpm_width" = "33"
    Info (12134): Parameter "lpm_widthu" = "6"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "rdsync_delaypipe" = "4"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
    Info (12134): Parameter "wrsync_delaypipe" = "4"
Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_cnm1.tdf
    Info (12023): Found entity 1: dcfifo_cnm1
Info (12128): Elaborating entity "dcfifo_cnm1" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_g2b.tdf
    Info (12023): Found entity 1: a_gray2bin_g2b
Info (12128): Elaborating entity "a_gray2bin_g2b" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_gray2bin_g2b:rdptr_g_gray2bin"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_d96.tdf
    Info (12023): Found entity 1: a_graycounter_d96
Info (12128): Elaborating entity "a_graycounter_d96" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_d96:rdptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_9nb.tdf
    Info (12023): Found entity 1: a_graycounter_9nb
Info (12128): Elaborating entity "a_graycounter_9nb" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|a_graycounter_9nb:wrptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_kv61.tdf
    Info (12023): Found entity 1: altsyncram_kv61
Info (12128): Elaborating entity "altsyncram_kv61" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|altsyncram_kv61:fifo_ram"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_vu8.tdf
    Info (12023): Found entity 1: dffpipe_vu8
Info (12128): Elaborating entity "dffpipe_vu8" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|dffpipe_vu8:rs_brp"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_6u7.tdf
    Info (12023): Found entity 1: alt_synch_pipe_6u7
Info (12128): Elaborating entity "alt_synch_pipe_6u7" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_0v8.tdf
    Info (12023): Found entity 1: dffpipe_0v8
Info (12128): Elaborating entity "dffpipe_0v8" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_6u7:rs_dgwp|dffpipe_0v8:dffpipe13"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_7u7.tdf
    Info (12023): Found entity 1: alt_synch_pipe_7u7
Info (12128): Elaborating entity "alt_synch_pipe_7u7" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_1v8.tdf
    Info (12023): Found entity 1: dffpipe_1v8
Info (12128): Elaborating entity "dffpipe_1v8" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|alt_synch_pipe_7u7:ws_dgrp|dffpipe_1v8:dffpipe16"
Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_1o5.tdf
    Info (12023): Found entity 1: cmpr_1o5
Info (12128): Elaborating entity "cmpr_1o5" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|USB_L2_TX_FIFO:C_FIFO_READOUT_TX|dcfifo:dcfifo_component|dcfifo_cnm1:auto_generated|cmpr_1o5:rdempty_eq_comp"
Info (12128): Elaborating entity "ser_crc_pol16_DIN16_D4_1a2eb" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC"
Info (12128): Elaborating entity "ser_crc" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_crc_pol16_DIN16_D4_1a2eb:C_CRC|ser_crc:C_CRC"
Info (12128): Elaborating entity "UFP_ENCODER_UART" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_ENCODER_UART:C_ENCODER"
Info (12128): Elaborating entity "UFP_DECODER" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|UFP_DECODER:C_DECODER"
Info (12128): Elaborating entity "ser_uart_wrapper" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART"
Info (12128): Elaborating entity "ser_uart_wrapper32" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1"
Info (12128): Elaborating entity "ser_uart" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART"
Info (12128): Elaborating entity "ser_uart_bdgen" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN"
Info (12128): Elaborating entity "ser_uart_ser" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_ser:C_SER"
Info (12128): Elaborating entity "ser_uart_deser" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER"
Info (12128): Elaborating entity "ser_data_5_bits_filter" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|ser_uart:C_UART|ser_uart_deser:C_DESER|ser_data_5_bits_filter:C_FILTER_SIN"
Info (12128): Elaborating entity "SER_UART_FIFO_TX32" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX"
Info (12128): Elaborating entity "dcfifo_mixed_widths" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
Info (12130): Elaborated megafunction instantiation "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
Info (12133): Instantiated megafunction "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_numwords" = "64"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "dcfifo_mixed_widths"
    Info (12134): Parameter "lpm_width" = "32"
    Info (12134): Parameter "lpm_widthu" = "6"
    Info (12134): Parameter "lpm_widthu_r" = "8"
    Info (12134): Parameter "lpm_width_r" = "8"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "rdsync_delaypipe" = "4"
    Info (12134): Parameter "read_aclr_synch" = "OFF"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
    Info (12134): Parameter "write_aclr_synch" = "OFF"
    Info (12134): Parameter "wrsync_delaypipe" = "4"
Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_cfq1.tdf
    Info (12023): Found entity 1: dcfifo_cfq1
Info (12128): Elaborating entity "dcfifo_cfq1" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_en6.tdf
    Info (12023): Found entity 1: a_graycounter_en6
Info (12128): Elaborating entity "a_graycounter_en6" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_en6:rdptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_b5c.tdf
    Info (12023): Found entity 1: a_graycounter_b5c
Info (12128): Elaborating entity "a_graycounter_b5c" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|a_graycounter_b5c:wrptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_rh91.tdf
    Info (12023): Found entity 1: altsyncram_rh91
Info (12128): Elaborating entity "altsyncram_rh91" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|altsyncram_rh91:fifo_ram"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_lc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_lc8
Info (12128): Elaborating entity "alt_synch_pipe_lc8" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_fd9.tdf
    Info (12023): Found entity 1: dffpipe_fd9
Info (12128): Elaborating entity "dffpipe_fd9" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_lc8:rs_dgwp|dffpipe_fd9:dffpipe12"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ed9.tdf
    Info (12023): Found entity 1: dffpipe_ed9
Info (12128): Elaborating entity "dffpipe_ed9" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|dffpipe_ed9:ws_brp"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_mc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_mc8
Info (12128): Elaborating entity "alt_synch_pipe_mc8" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_gd9.tdf
    Info (12023): Found entity 1: dffpipe_gd9
Info (12128): Elaborating entity "dffpipe_gd9" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|alt_synch_pipe_mc8:ws_dgrp|dffpipe_gd9:dffpipe16"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_qld.tdf
    Info (12023): Found entity 1: cntr_qld
Info (12128): Elaborating entity "cntr_qld" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_TX32:C_FIFO_TX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_cfq1:auto_generated|cntr_qld:cntr_b"
Info (12128): Elaborating entity "SER_UART_FIFO_RX32" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX"
Info (12128): Elaborating entity "dcfifo_mixed_widths" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
Info (12130): Elaborated megafunction instantiation "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component"
Info (12133): Instantiated megafunction "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_numwords" = "256"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "dcfifo_mixed_widths"
    Info (12134): Parameter "lpm_width" = "8"
    Info (12134): Parameter "lpm_widthu" = "8"
    Info (12134): Parameter "lpm_widthu_r" = "6"
    Info (12134): Parameter "lpm_width_r" = "32"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "rdsync_delaypipe" = "4"
    Info (12134): Parameter "read_aclr_synch" = "OFF"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
    Info (12134): Parameter "write_aclr_synch" = "OFF"
    Info (12134): Parameter "wrsync_delaypipe" = "4"
Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_enp1.tdf
    Info (12023): Found entity 1: dcfifo_enp1
Info (12128): Elaborating entity "dcfifo_enp1" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_fn6.tdf
    Info (12023): Found entity 1: a_graycounter_fn6
Info (12128): Elaborating entity "a_graycounter_fn6" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_fn6:rdptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_a5c.tdf
    Info (12023): Found entity 1: a_graycounter_a5c
Info (12128): Elaborating entity "a_graycounter_a5c" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|a_graycounter_a5c:wrptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_sh91.tdf
    Info (12023): Found entity 1: altsyncram_sh91
Info (12128): Elaborating entity "altsyncram_sh91" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|altsyncram_sh91:fifo_ram"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_nc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_nc8
Info (12128): Elaborating entity "alt_synch_pipe_nc8" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_hd9.tdf
    Info (12023): Found entity 1: dffpipe_hd9
Info (12128): Elaborating entity "dffpipe_hd9" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_nc8:rs_dgwp|dffpipe_hd9:dffpipe12"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_oc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_oc8
Info (12128): Elaborating entity "alt_synch_pipe_oc8" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_id9.tdf
    Info (12023): Found entity 1: dffpipe_id9
Info (12128): Elaborating entity "dffpipe_id9" for hierarchy "UFP_WRAPPER_USB_UART:C_WRAPPER_USB|ser_uart_wrapper:C_UART|ser_uart_wrapper32:\g32:u1|SER_UART_FIFO_RX32:C_FIFO_RX|dcfifo_mixed_widths:dcfifo_mixed_widths_component|dcfifo_enp1:auto_generated|alt_synch_pipe_oc8:ws_dgrp|dffpipe_id9:dffpipe15"
Info (12128): Elaborating entity "AID_L2_DPRAM" for hierarchy "AID_L2_DPRAM:C_DPRAM"
Info (12128): Elaborating entity "altsyncram" for hierarchy "AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component"
Info (12130): Elaborated megafunction instantiation "AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component"
Info (12133): Instantiated megafunction "AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component" with the following parameter:
    Info (12134): Parameter "address_aclr_a" = "UNUSED"
    Info (12134): Parameter "address_aclr_b" = "NONE"
    Info (12134): Parameter "address_reg_b" = "CLOCK0"
    Info (12134): Parameter "byte_size" = "8"
    Info (12134): Parameter "byteena_aclr_a" = "UNUSED"
    Info (12134): Parameter "byteena_aclr_b" = "NONE"
    Info (12134): Parameter "byteena_reg_b" = "CLOCK1"
    Info (12134): Parameter "clock_enable_core_a" = "USE_INPUT_CLKEN"
    Info (12134): Parameter "clock_enable_core_b" = "USE_INPUT_CLKEN"
    Info (12134): Parameter "clock_enable_input_a" = "BYPASS"
    Info (12134): Parameter "clock_enable_input_b" = "BYPASS"
    Info (12134): Parameter "clock_enable_output_a" = "NORMAL"
    Info (12134): Parameter "clock_enable_output_b" = "BYPASS"
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "ecc_pipeline_stage_enabled" = "FALSE"
    Info (12134): Parameter "enable_ecc" = "FALSE"
    Info (12134): Parameter "implement_in_les" = "OFF"
    Info (12134): Parameter "indata_aclr_a" = "UNUSED"
    Info (12134): Parameter "indata_aclr_b" = "NONE"
    Info (12134): Parameter "indata_reg_b" = "CLOCK1"
    Info (12134): Parameter "init_file" = "UNUSED"
    Info (12134): Parameter "init_file_layout" = "PORT_A"
    Info (12134): Parameter "maximum_depth" = "0"
    Info (12134): Parameter "numwords_a" = "512"
    Info (12134): Parameter "numwords_b" = "512"
    Info (12134): Parameter "operation_mode" = "DUAL_PORT"
    Info (12134): Parameter "outdata_aclr_a" = "NONE"
    Info (12134): Parameter "outdata_aclr_b" = "NONE"
    Info (12134): Parameter "outdata_reg_a" = "UNREGISTERED"
    Info (12134): Parameter "outdata_reg_b" = "UNREGISTERED"
    Info (12134): Parameter "power_up_uninitialized" = "FALSE"
    Info (12134): Parameter "ram_block_type" = "AUTO"
    Info (12134): Parameter "rdcontrol_aclr_b" = "NONE"
    Info (12134): Parameter "rdcontrol_reg_b" = "CLOCK1"
    Info (12134): Parameter "read_during_write_mode_mixed_ports" = "DONT_CARE"
    Info (12134): Parameter "read_during_write_mode_port_a" = "NEW_DATA_NO_NBE_READ"
    Info (12134): Parameter "read_during_write_mode_port_b" = "NEW_DATA_NO_NBE_READ"
    Info (12134): Parameter "stratixiv_m144k_allow_dual_clocks" = "ON"
    Info (12134): Parameter "width_a" = "16"
    Info (12134): Parameter "width_b" = "16"
    Info (12134): Parameter "width_byteena_a" = "1"
    Info (12134): Parameter "width_byteena_b" = "1"
    Info (12134): Parameter "width_eccstatus" = "3"
    Info (12134): Parameter "widthad_a" = "9"
    Info (12134): Parameter "widthad_b" = "9"
    Info (12134): Parameter "wrcontrol_aclr_a" = "UNUSED"
    Info (12134): Parameter "wrcontrol_aclr_b" = "NONE"
    Info (12134): Parameter "wrcontrol_wraddress_reg_b" = "CLOCK1"
    Info (12134): Parameter "lpm_hint" = "UNUSED"
    Info (12134): Parameter "lpm_type" = "altsyncram"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_glu3.tdf
    Info (12023): Found entity 1: altsyncram_glu3
Info (12128): Elaborating entity "altsyncram_glu3" for hierarchy "AID_L2_DPRAM:C_DPRAM|altsyncram:altsyncram_component|altsyncram_glu3:auto_generated"
Info (12128): Elaborating entity "AID_L3_AC_WRAPPER" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER"
Info (12128): Elaborating entity "AID_L3_WRAPPER_TSM" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM"
Info (10008): Verilog HDL or VHDL information: EDA Netlist Writer cannot regroup multidimensional array "sl_int_latched_hit_id" into its bus
Info (12128): Elaborating entity "AID_L1_Threshold_SM" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_Threshold_SM:\C_THRESHOLD_SM:0:C_THRESHOLD_SMX"
Info (12128): Elaborating entity "AID_L1_FIFO" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX"
Info (12128): Elaborating entity "scfifo" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component"
Info (12133): Instantiated megafunction "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component" with the following parameter:
    Info (12134): Parameter "add_ram_output_register" = "OFF"
    Info (12134): Parameter "almost_empty_value" = "2"
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_hint" = "RAM_BLOCK_TYPE=M10K"
    Info (12134): Parameter "lpm_numwords" = "128"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "scfifo"
    Info (12134): Parameter "lpm_width" = "28"
    Info (12134): Parameter "lpm_widthu" = "7"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_57h1.tdf
    Info (12023): Found entity 1: scfifo_57h1
Info (12128): Elaborating entity "scfifo_57h1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_dke1.tdf
    Info (12023): Found entity 1: a_dpfifo_dke1
Info (12128): Elaborating entity "a_dpfifo_dke1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_t7f.tdf
    Info (12023): Found entity 1: a_fefifo_t7f
Info (12128): Elaborating entity "a_fefifo_t7f" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_2a7.tdf
    Info (12023): Found entity 1: cntr_2a7
Info (12128): Elaborating entity "cntr_2a7" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|a_fefifo_t7f:fifo_state|cntr_2a7:count_usedw"
Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_tgb1.tdf
    Info (12023): Found entity 1: dpram_tgb1
Info (12128): Elaborating entity "dpram_tgb1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_p0s1.tdf
    Info (12023): Found entity 1: altsyncram_p0s1
Info (12128): Elaborating entity "altsyncram_p0s1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|dpram_tgb1:FIFOram|altsyncram_p0s1:altsyncram1"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_m9b.tdf
    Info (12023): Found entity 1: cntr_m9b
Info (12128): Elaborating entity "cntr_m9b" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO:\C_FIFO_HGLG:0:C_FIFOX|scfifo:scfifo_component|scfifo_57h1:auto_generated|a_dpfifo_dke1:dpfifo|cntr_m9b:rd_ptr_count"
Info (12128): Elaborating entity "AID_L1_FIFO_OTHER" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX"
Info (12128): Elaborating entity "scfifo" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component"
Info (12133): Instantiated megafunction "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component" with the following parameter:
    Info (12134): Parameter "add_ram_output_register" = "OFF"
    Info (12134): Parameter "almost_empty_value" = "2"
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_hint" = "RAM_BLOCK_TYPE=M10K"
    Info (12134): Parameter "lpm_numwords" = "4"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "scfifo"
    Info (12134): Parameter "lpm_width" = "28"
    Info (12134): Parameter "lpm_widthu" = "2"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_p3h1.tdf
    Info (12023): Found entity 1: scfifo_p3h1
Info (12128): Elaborating entity "scfifo_p3h1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_1he1.tdf
    Info (12023): Found entity 1: a_dpfifo_1he1
Info (12128): Elaborating entity "a_dpfifo_1he1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_h4f.tdf
    Info (12023): Found entity 1: a_fefifo_h4f
Info (12128): Elaborating entity "a_fefifo_h4f" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|a_fefifo_h4f:fifo_state"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_t97.tdf
    Info (12023): Found entity 1: cntr_t97
Info (12128): Elaborating entity "cntr_t97" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|a_fefifo_h4f:fifo_state|cntr_t97:count_usedw"
Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_ogb1.tdf
    Info (12023): Found entity 1: dpram_ogb1
Info (12128): Elaborating entity "dpram_ogb1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_f0s1.tdf
    Info (12023): Found entity 1: altsyncram_f0s1
Info (12128): Elaborating entity "altsyncram_f0s1" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|dpram_ogb1:FIFOram|altsyncram_f0s1:altsyncram1"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_h9b.tdf
    Info (12023): Found entity 1: cntr_h9b
Info (12128): Elaborating entity "cntr_h9b" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_TSM:C_WRAPPER_TSM|AID_L1_FIFO_OTHER:\C_FIFO_OTHER:6:C_FIFO_OTHERX|scfifo:scfifo_component|scfifo_p3h1:auto_generated|a_dpfifo_1he1:dpfifo|cntr_h9b:rd_ptr_count"
Info (12128): Elaborating entity "AID_L3_WRAPPER_ADC" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC"
Info (12128): Elaborating entity "AID_L1_ADC_DDR" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR"
Info (12128): Elaborating entity "altddio_in" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component"
Info (12130): Elaborated megafunction instantiation "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component"
Info (12133): Instantiated megafunction "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "implement_input_in_lcell" = "ON"
    Info (12134): Parameter "invert_input_clocks" = "ON"
    Info (12134): Parameter "power_up_high" = "OFF"
    Info (12134): Parameter "width" = "8"
    Info (12134): Parameter "lpm_hint" = "UNUSED"
    Info (12134): Parameter "lpm_type" = "altddio_in"
Info (12021): Found 1 design units, including 1 entities, in source file db/ddio_in_0ai.tdf
    Info (12023): Found entity 1: ddio_in_0ai
Info (12128): Elaborating entity "ddio_in_0ai" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_DDR:C_ADC_DDR|altddio_in:ALTDDIO_IN_component|ddio_in_0ai:auto_generated"
Info (12128): Elaborating entity "AID_L1_ADC_Driver" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_Driver:C_ADC_Driver"
Info (12128): Elaborating entity "AID_L1_ADC_SM" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_ADC_SM:C_ADC_SM"
Info (12128): Elaborating entity "AID_L1_Hold_Manager" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L1_Hold_Manager:C_HOLD_MANAGER"
Info (12128): Elaborating entity "AID_L2_ADC_INIT" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init"
Info (12128): Elaborating entity "AID_L1_SM" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM"
Info (12128): Elaborating entity "AID_L1_SM_READER" for hierarchy "AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
Info (12128): Elaborating entity "AID_L2_FIFO" for hierarchy "AID_L2_FIFO:C_FIFO_L2"
Info (12128): Elaborating entity "dcfifo" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component"
Info (12133): Instantiated megafunction "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_numwords" = "4096"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "dcfifo"
    Info (12134): Parameter "lpm_width" = "33"
    Info (12134): Parameter "lpm_widthu" = "12"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "rdsync_delaypipe" = "4"
    Info (12134): Parameter "read_aclr_synch" = "OFF"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
    Info (12134): Parameter "write_aclr_synch" = "OFF"
    Info (12134): Parameter "wrsync_delaypipe" = "4"
Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_qfr1.tdf
    Info (12023): Found entity 1: dcfifo_qfr1
Info (12128): Elaborating entity "dcfifo_qfr1" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_t3b.tdf
    Info (12023): Found entity 1: a_gray2bin_t3b
Info (12128): Elaborating entity "a_gray2bin_t3b" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_gray2bin_t3b:rdptr_g_gray2bin"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_so6.tdf
    Info (12023): Found entity 1: a_graycounter_so6
Info (12128): Elaborating entity "a_graycounter_so6" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_so6:rdptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_o6c.tdf
    Info (12023): Found entity 1: a_graycounter_o6c
Info (12128): Elaborating entity "a_graycounter_o6c" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|a_graycounter_o6c:wrptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_2m91.tdf
    Info (12023): Found entity 1: altsyncram_2m91
Info (12128): Elaborating entity "altsyncram_2m91" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|altsyncram_2m91:fifo_ram"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_re9.tdf
    Info (12023): Found entity 1: dffpipe_re9
Info (12128): Elaborating entity "dffpipe_re9" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|dffpipe_re9:rs_brp"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_2e8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_2e8
Info (12128): Elaborating entity "alt_synch_pipe_2e8" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_se9.tdf
    Info (12023): Found entity 1: dffpipe_se9
Info (12128): Elaborating entity "dffpipe_se9" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_2e8:rs_dgwp|dffpipe_se9:dffpipe13"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_3e8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_3e8
Info (12128): Elaborating entity "alt_synch_pipe_3e8" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_te9.tdf
    Info (12023): Found entity 1: dffpipe_te9
Info (12128): Elaborating entity "dffpipe_te9" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|alt_synch_pipe_3e8:ws_dgrp|dffpipe_te9:dffpipe16"
Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_ep5.tdf
    Info (12023): Found entity 1: cmpr_ep5
Info (12128): Elaborating entity "cmpr_ep5" for hierarchy "AID_L2_FIFO:C_FIFO_L2|dcfifo:dcfifo_component|dcfifo_qfr1:auto_generated|cmpr_ep5:rdempty_eq_comp"
Info (12128): Elaborating entity "AID_L2_ASICSLOWCONTROL" for hierarchy "AID_L2_ASICSLOWCONTROL:C_ASICSLOWCONTROL"
Info (12128): Elaborating entity "AID_L2_ASICPROBECONTROL" for hierarchy "AID_L2_ASICPROBECONTROL:C_ASICPROBECONTROL"
Info (12128): Elaborating entity "AID_L2_FPGASLOWCONTROL" for hierarchy "AID_L2_FPGASLOWCONTROL:C_FPGASLOWCONTROL"
Info (12128): Elaborating entity "AID_L2_HVONSLOWCONTROL" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON"
Info (12128): Elaborating entity "UFP_USER_SET_CONFIG" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_SET_CONFIG:C_HVON_USER_SET"
Info (12128): Elaborating entity "UFP_USER_GET_CONFIG" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|UFP_USER_GET_CONFIG:C_HVON_USER_GET"
Info (12128): Elaborating entity "AID_L2_HVONAPPLY" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY"
Info (12128): Elaborating entity "U_OnePulse" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|AID_L2_HVONAPPLY:C_HVON_APPLY|U_OnePulse:C_BDRATE_PULSE"
Info (12128): Elaborating entity "ser_uart_wrapper" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART"
Info (12128): Elaborating entity "ser_uart_wrapper8_d4" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1"
Info (12128): Elaborating entity "ser_uart" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART"
Info (12128): Elaborating entity "ser_uart_bdgen" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|ser_uart:C_UART|ser_uart_bdgen:C_BDGEN"
Info (12128): Elaborating entity "SER_UART_FIFO8_D4" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX"
Info (12128): Elaborating entity "dcfifo" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component"
Info (12133): Instantiated megafunction "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_numwords" = "16"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "dcfifo"
    Info (12134): Parameter "lpm_width" = "8"
    Info (12134): Parameter "lpm_widthu" = "4"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "rdsync_delaypipe" = "4"
    Info (12134): Parameter "read_aclr_synch" = "OFF"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
    Info (12134): Parameter "write_aclr_synch" = "OFF"
    Info (12134): Parameter "wrsync_delaypipe" = "4"
Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_mdq1.tdf
    Info (12023): Found entity 1: dcfifo_mdq1
Info (12128): Elaborating entity "dcfifo_mdq1" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_e2b.tdf
    Info (12023): Found entity 1: a_gray2bin_e2b
Info (12128): Elaborating entity "a_gray2bin_e2b" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_gray2bin_e2b:wrptr_g_gray2bin"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_dn6.tdf
    Info (12023): Found entity 1: a_graycounter_dn6
Info (12128): Elaborating entity "a_graycounter_dn6" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_dn6:rdptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_95c.tdf
    Info (12023): Found entity 1: a_graycounter_95c
Info (12128): Elaborating entity "a_graycounter_95c" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|a_graycounter_95c:wrptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_8g91.tdf
    Info (12023): Found entity 1: altsyncram_8g91
Info (12128): Elaborating entity "altsyncram_8g91" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|altsyncram_8g91:fifo_ram"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_pc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_pc8
Info (12128): Elaborating entity "alt_synch_pipe_pc8" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ld9.tdf
    Info (12023): Found entity 1: dffpipe_ld9
Info (12128): Elaborating entity "dffpipe_ld9" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_pc8:rs_dgwp|dffpipe_ld9:dffpipe10"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_md9.tdf
    Info (12023): Found entity 1: dffpipe_md9
Info (12128): Elaborating entity "dffpipe_md9" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|dffpipe_md9:ws_brp"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_qc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_qc8
Info (12128): Elaborating entity "alt_synch_pipe_qc8" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_nd9.tdf
    Info (12023): Found entity 1: dffpipe_nd9
Info (12128): Elaborating entity "dffpipe_nd9" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|alt_synch_pipe_qc8:ws_dgrp|dffpipe_nd9:dffpipe14"
Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_vn5.tdf
    Info (12023): Found entity 1: cmpr_vn5
Info (12128): Elaborating entity "cmpr_vn5" for hierarchy "AID_L2_HVONSLOWCONTROL:C_HVON|ser_uart_wrapper:C_UART|ser_uart_wrapper8_d4:\g8_d4:u1|SER_UART_FIFO8_D4:C_FIFO_TX|dcfifo:dcfifo_component|dcfifo_mdq1:auto_generated|cmpr_vn5:rdempty_eq_comp"
Info (12128): Elaborating entity "UFP_USER_SETGET_ACK" for hierarchy "UFP_USER_SETGET_ACK:C_GET_ACK"
Info (12128): Elaborating entity "AID_L1_TC_WRAPPER" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER"
Info (12128): Elaborating entity "AID_L0_TC_WRAPPER" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER"
Info (12128): Elaborating entity "AID_L0_TrigCounters" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC"
Info (12128): Elaborating entity "U_EdgePulse" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TrigCounters:C_TC|U_EdgePulse:\C_EDGE_PULSE:0:C_EDGE_PULSEX"
Info (12128): Elaborating entity "AID_L0_TRIG_DELAY" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX"
Info (12128): Elaborating entity "lpm_shiftreg" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component"
Info (12130): Elaborated megafunction instantiation "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component"
Info (12133): Instantiated megafunction "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_TRIG_DELAY:\C_TRIG_DELAY_SR:0:C_TRIG_DELAY_SRX|lpm_shiftreg:LPM_SHIFTREG_component" with the following parameter:
    Info (12134): Parameter "lpm_direction" = "LEFT"
    Info (12134): Parameter "lpm_type" = "LPM_SHIFTREG"
    Info (12134): Parameter "lpm_width" = "64"
Info (12128): Elaborating entity "AID_L0_FIFO" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX"
Info (12128): Elaborating entity "dcfifo" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component"
Info (12133): Instantiated megafunction "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_hint" = "RAM_BLOCK_TYPE=MLAB"
    Info (12134): Parameter "lpm_numwords" = "8"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "dcfifo"
    Info (12134): Parameter "lpm_width" = "18"
    Info (12134): Parameter "lpm_widthu" = "3"
    Info (12134): Parameter "overflow_checking" = "OFF"
    Info (12134): Parameter "rdsync_delaypipe" = "4"
    Info (12134): Parameter "read_aclr_synch" = "OFF"
    Info (12134): Parameter "underflow_checking" = "OFF"
    Info (12134): Parameter "use_eab" = "ON"
    Info (12134): Parameter "write_aclr_synch" = "OFF"
    Info (12134): Parameter "wrsync_delaypipe" = "4"
Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_ohv1.tdf
    Info (12023): Found entity 1: dcfifo_ohv1
Info (12128): Elaborating entity "dcfifo_ohv1" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_d2b.tdf
    Info (12023): Found entity 1: a_gray2bin_d2b
Info (12128): Elaborating entity "a_gray2bin_d2b" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_gray2bin_d2b:rdptr_g_gray2bin"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_cn6.tdf
    Info (12023): Found entity 1: a_graycounter_cn6
Info (12128): Elaborating entity "a_graycounter_cn6" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_cn6:rdptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_85c.tdf
    Info (12023): Found entity 1: a_graycounter_85c
Info (12128): Elaborating entity "a_graycounter_85c" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|a_graycounter_85c:wrptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_tm91.tdf
    Info (12023): Found entity 1: dpram_tm91
Info (12128): Elaborating entity "dpram_tm91" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dpram_tm91:fifo_lutram"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_bd9.tdf
    Info (12023): Found entity 1: dffpipe_bd9
Info (12128): Elaborating entity "dffpipe_bd9" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|dffpipe_bd9:rs_brp"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_ic8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_ic8
Info (12128): Elaborating entity "alt_synch_pipe_ic8" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_cd9.tdf
    Info (12023): Found entity 1: dffpipe_cd9
Info (12128): Elaborating entity "dffpipe_cd9" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_ic8:rs_dgwp|dffpipe_cd9:dffpipe10"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_jc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_jc8
Info (12128): Elaborating entity "alt_synch_pipe_jc8" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_dd9.tdf
    Info (12023): Found entity 1: dffpipe_dd9
Info (12128): Elaborating entity "dffpipe_dd9" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|alt_synch_pipe_jc8:ws_dgrp|dffpipe_dd9:dffpipe13"
Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_un5.tdf
    Info (12023): Found entity 1: cmpr_un5
Info (12128): Elaborating entity "cmpr_un5" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO:\C_FIFO_HIT:0:C_FIFO_HITX|dcfifo:dcfifo_component|dcfifo_ohv1:auto_generated|cmpr_un5:rdempty_eq_comp"
Info (12128): Elaborating entity "AID_L0_FIFO_PERIOD" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD"
Info (12128): Elaborating entity "dcfifo" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component"
Info (12133): Instantiated megafunction "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component" with the following parameter:
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_hint" = "RAM_BLOCK_TYPE=MLAB"
    Info (12134): Parameter "lpm_numwords" = "4"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "dcfifo"
    Info (12134): Parameter "lpm_width" = "21"
    Info (12134): Parameter "lpm_widthu" = "2"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "rdsync_delaypipe" = "4"
    Info (12134): Parameter "read_aclr_synch" = "OFF"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
    Info (12134): Parameter "write_aclr_synch" = "OFF"
    Info (12134): Parameter "wrsync_delaypipe" = "4"
Info (12021): Found 1 design units, including 1 entities, in source file db/dcfifo_abv1.tdf
    Info (12023): Found entity 1: dcfifo_abv1
Info (12128): Elaborating entity "dcfifo_abv1" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_gray2bin_c2b.tdf
    Info (12023): Found entity 1: a_gray2bin_c2b
Info (12128): Elaborating entity "a_gray2bin_c2b" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_gray2bin_c2b:rdptr_g_gray2bin"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_bn6.tdf
    Info (12023): Found entity 1: a_graycounter_bn6
Info (12128): Elaborating entity "a_graycounter_bn6" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_bn6:rdptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_graycounter_75c.tdf
    Info (12023): Found entity 1: a_graycounter_75c
Info (12128): Elaborating entity "a_graycounter_75c" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|a_graycounter_75c:wrptr_g1p"
Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_mm91.tdf
    Info (12023): Found entity 1: dpram_mm91
Info (12128): Elaborating entity "dpram_mm91" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dpram_mm91:fifo_lutram"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_ad9.tdf
    Info (12023): Found entity 1: dffpipe_ad9
Info (12128): Elaborating entity "dffpipe_ad9" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|dffpipe_ad9:rs_brp"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_hc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_hc8
Info (12128): Elaborating entity "alt_synch_pipe_hc8" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_jd9.tdf
    Info (12023): Found entity 1: dffpipe_jd9
Info (12128): Elaborating entity "dffpipe_jd9" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_hc8:rs_dgwp|dffpipe_jd9:dffpipe10"
Info (12021): Found 1 design units, including 1 entities, in source file db/alt_synch_pipe_kc8.tdf
    Info (12023): Found entity 1: alt_synch_pipe_kc8
Info (12128): Elaborating entity "alt_synch_pipe_kc8" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp"
Info (12021): Found 1 design units, including 1 entities, in source file db/dffpipe_kd9.tdf
    Info (12023): Found entity 1: dffpipe_kd9
Info (12128): Elaborating entity "dffpipe_kd9" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|alt_synch_pipe_kc8:ws_dgrp|dffpipe_kd9:dffpipe13"
Info (12021): Found 1 design units, including 1 entities, in source file db/cmpr_tn5.tdf
    Info (12023): Found entity 1: cmpr_tn5
Info (12128): Elaborating entity "cmpr_tn5" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L0_TC_WRAPPER:C_TC_WRAPPER|AID_L0_FIFO_PERIOD:C_FIFO_PERIOD|dcfifo:dcfifo_component|dcfifo_abv1:auto_generated|cmpr_tn5:rdempty_eq_comp"
Info (12128): Elaborating entity "AID_L1_HIT_FIFO" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX"
Info (12128): Elaborating entity "scfifo" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component"
Info (12133): Instantiated megafunction "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component" with the following parameter:
    Info (12134): Parameter "add_ram_output_register" = "OFF"
    Info (12134): Parameter "almost_empty_value" = "2"
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_hint" = "RAM_BLOCK_TYPE=M10K"
    Info (12134): Parameter "lpm_numwords" = "8"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "scfifo"
    Info (12134): Parameter "lpm_width" = "32"
    Info (12134): Parameter "lpm_widthu" = "3"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_q3h1.tdf
    Info (12023): Found entity 1: scfifo_q3h1
Info (12128): Elaborating entity "scfifo_q3h1" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_2he1.tdf
    Info (12023): Found entity 1: a_dpfifo_2he1
Info (12128): Elaborating entity "a_dpfifo_2he1" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_m4f.tdf
    Info (12023): Found entity 1: a_fefifo_m4f
Info (12128): Elaborating entity "a_fefifo_m4f" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_u97.tdf
    Info (12023): Found entity 1: cntr_u97
Info (12128): Elaborating entity "cntr_u97" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|a_fefifo_m4f:fifo_state|cntr_u97:count_usedw"
Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_kgb1.tdf
    Info (12023): Found entity 1: dpram_kgb1
Info (12128): Elaborating entity "dpram_kgb1" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_70s1.tdf
    Info (12023): Found entity 1: altsyncram_70s1
Info (12128): Elaborating entity "altsyncram_70s1" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|dpram_kgb1:FIFOram|altsyncram_70s1:altsyncram1"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_i9b.tdf
    Info (12023): Found entity 1: cntr_i9b
Info (12128): Elaborating entity "cntr_i9b" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_HIT_FIFO:\C_FIFO_L1_HIT:0:C_FIFO_L1_HITX|scfifo:scfifo_component|scfifo_q3h1:auto_generated|a_dpfifo_2he1:dpfifo|cntr_i9b:rd_ptr_count"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:0:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:1:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:2:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:3:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:4:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:5:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:6:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:7:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:8:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:9:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:10:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_TC_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_TC_SM:\C_L1_TC_SM:11:C_L1_TC_SMX"
Info (12128): Elaborating entity "AID_L1_SM" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM"
Info (12128): Elaborating entity "AID_L1_SM_READER" for hierarchy "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER|AID_L1_SM:C_L1_SM|AID_L1_SM_READER:\C_GEN_READERX:1:C_RX"
Info (12128): Elaborating entity "AID_L3_SM_WRAPPER" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER"
Info (12128): Elaborating entity "AID_L1_Counters" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L1_Counters:C_L1Counters"
Info (12128): Elaborating entity "AID_L2i_FIFO" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h"
Info (12128): Elaborating entity "scfifo" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component"
Info (12130): Elaborated megafunction instantiation "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component"
Info (12133): Instantiated megafunction "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component" with the following parameter:
    Info (12134): Parameter "add_ram_output_register" = "OFF"
    Info (12134): Parameter "almost_empty_value" = "2"
    Info (12134): Parameter "intended_device_family" = "Arria V"
    Info (12134): Parameter "lpm_hint" = "RAM_BLOCK_TYPE=M10K"
    Info (12134): Parameter "lpm_numwords" = "256"
    Info (12134): Parameter "lpm_showahead" = "OFF"
    Info (12134): Parameter "lpm_type" = "scfifo"
    Info (12134): Parameter "lpm_width" = "32"
    Info (12134): Parameter "lpm_widthu" = "8"
    Info (12134): Parameter "overflow_checking" = "ON"
    Info (12134): Parameter "underflow_checking" = "ON"
    Info (12134): Parameter "use_eab" = "ON"
Info (12021): Found 1 design units, including 1 entities, in source file db/scfifo_37h1.tdf
    Info (12023): Found entity 1: scfifo_37h1
Info (12128): Elaborating entity "scfifo_37h1" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_dpfifo_bke1.tdf
    Info (12023): Found entity 1: a_dpfifo_bke1
Info (12128): Elaborating entity "a_dpfifo_bke1" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo"
Info (12021): Found 1 design units, including 1 entities, in source file db/a_fefifo_08f.tdf
    Info (12023): Found entity 1: a_fefifo_08f
Info (12128): Elaborating entity "a_fefifo_08f" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|a_fefifo_08f:fifo_state"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_3a7.tdf
    Info (12023): Found entity 1: cntr_3a7
Info (12128): Elaborating entity "cntr_3a7" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|a_fefifo_08f:fifo_state|cntr_3a7:count_usedw"
Info (12021): Found 1 design units, including 1 entities, in source file db/dpram_pgb1.tdf
    Info (12023): Found entity 1: dpram_pgb1
Info (12128): Elaborating entity "dpram_pgb1" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram"
Info (12021): Found 1 design units, including 1 entities, in source file db/altsyncram_h0s1.tdf
    Info (12023): Found entity 1: altsyncram_h0s1
Info (12128): Elaborating entity "altsyncram_h0s1" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|dpram_pgb1:FIFOram|altsyncram_h0s1:altsyncram1"
Info (12021): Found 1 design units, including 1 entities, in source file db/cntr_n9b.tdf
    Info (12023): Found entity 1: cntr_n9b
Info (12128): Elaborating entity "cntr_n9b" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L2i_FIFO:C_FIFO_L2h|scfifo:scfifo_component|scfifo_37h1:auto_generated|a_dpfifo_bke1:dpfifo|cntr_n9b:rd_ptr_count"
Info (12128): Elaborating entity "AID_L3_SM" for hierarchy "AID_L3_SM_WRAPPER:C_L3_SM_WRAPPER|AID_L3_SM:C_L3_SM"
Info (12205): 1 design partition requires Analysis and Synthesis
    Info (12210): Partition "Top" requires synthesis because its netlist type is Source File
Info (12207): 1 design partition does not require synthesis
    Info (12229): Partition "AID_L1_TC_WRAPPER:C_L1_TC_WRAPPER" does not require synthesis because there were no relevant design changes
Warning (12241): 1 hierarchies have connectivity warnings - see the Connectivity Checks report folder
Info (281020): Starting Logic Optimization and Technology Mapping for Top Partition
Warning (13034): The following nodes have both tri-state and non-tri-state drivers
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[0]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[1]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[2]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[3]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[4]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[5]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[6]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[7]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[8]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[9]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[10]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[11]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[12]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[13]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[14]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[15]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[16]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[17]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[18]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[19]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[20]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[21]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[22]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[23]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[24]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[25]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[26]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[27]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[28]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[29]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[30]" and its non-tri-state driver.
    Warning (13035): Inserted always-enabled tri-state buffer between "x_ucDQ[31]" and its non-tri-state driver.
Info (13000): Registers with preset signals will power-up high
Info (13003): DEV_CLRn pin will set, and not reset, register with preset signal due to NOT Gate Push-Back
Warning (13009): TRI or OPNDRN buffers permanently enabled
    Warning (13010): Node "x_ucDQ[0]~synth"
    Warning (13010): Node "x_ucDQ[1]~synth"
    Warning (13010): Node "x_ucDQ[2]~synth"
    Warning (13010): Node "x_ucDQ[3]~synth"
    Warning (13010): Node "x_ucDQ[4]~synth"
    Warning (13010): Node "x_ucDQ[5]~synth"
    Warning (13010): Node "x_ucDQ[6]~synth"
    Warning (13010): Node "x_ucDQ[7]~synth"
    Warning (13010): Node "x_ucDQ[8]~synth"
    Warning (13010): Node "x_ucDQ[9]~synth"
    Warning (13010): Node "x_ucDQ[10]~synth"
    Warning (13010): Node "x_ucDQ[11]~synth"
    Warning (13010): Node "x_ucDQ[12]~synth"
    Warning (13010): Node "x_ucDQ[13]~synth"
    Warning (13010): Node "x_ucDQ[14]~synth"
    Warning (13010): Node "x_ucDQ[15]~synth"
    Warning (13010): Node "x_ucDQ[16]~synth"
    Warning (13010): Node "x_ucDQ[17]~synth"
    Warning (13010): Node "x_ucDQ[18]~synth"
    Warning (13010): Node "x_ucDQ[19]~synth"
    Warning (13010): Node "x_ucDQ[20]~synth"
    Warning (13010): Node "x_ucDQ[21]~synth"
    Warning (13010): Node "x_ucDQ[22]~synth"
    Warning (13010): Node "x_ucDQ[23]~synth"
    Warning (13010): Node "x_ucDQ[24]~synth"
    Warning (13010): Node "x_ucDQ[25]~synth"
    Warning (13010): Node "x_ucDQ[26]~synth"
    Warning (13010): Node "x_ucDQ[27]~synth"
    Warning (13010): Node "x_ucDQ[28]~synth"
    Warning (13010): Node "x_ucDQ[29]~synth"
    Warning (13010): Node "x_ucDQ[30]~synth"
    Warning (13010): Node "x_ucDQ[31]~synth"
Warning (13024): Output pins are stuck at VCC or GND
    Warning (13410): Pin "x_aPs_modeb_ext" is stuck at GND
    Warning (13410): Pin "x_aPs_global_trig" is stuck at GND
    Warning (13410): Pin "x_aPwr_on" is stuck at GND
    Warning (13410): Pin "x_ucSLRDn" is stuck at VCC
    Warning (13410): Pin "x_ucSLOEn" is stuck at VCC
    Warning (13410): Pin "x_ucADR[0]" is stuck at GND
    Warning (13410): Pin "x_ucADR[1]" is stuck at GND
    Warning (13410): Pin "x_uart_RTSn" is stuck at VCC
    Warning (13410): Pin "x_sync_tx" is stuck at GND
    Warning (13410): Pin "x_sync_out" is stuck at GND
    Warning (13410): Pin "x_sync_clkout" is stuck at GND
    Warning (13410): Pin "x_uart_chain_next_rts" is stuck at VCC
    Warning (13410): Pin "x_uart_chain_next_tx" is stuck at VCC
    Warning (13410): Pin "x_uart_chain_prev_rts" is stuck at VCC
    Warning (13410): Pin "x_uart_chain_prev_tx" is stuck at VCC
Info (286031): Timing-Driven Synthesis is running on partition "Top"
Warning (14632): Output pin "x_mTestPoint[10]" driven by bidirectional pin "x_hvon_rs" cannot be tri-stated
Critical Warning (18061): Ignored Power-Up Level option on the following registers
    Critical Warning (18010): Register AID_L3_AC_WRAPPER:C_AC_WRAPPER|AID_L3_WRAPPER_ADC:C_WRAPPER_ADC|AID_L2_ADC_INIT:C_ADC_Init|sl_int_adc_clk_state will power up to High
Info (17049): 100 registers lost all their fanouts during netlist optimizations.
Info (17016): Found the following redundant logic cells in design
    Info (17048): Logic cell "sl_int_fifo_L0_data_clr"
    Info (17048): Logic cell "sl_int_adc_initialized"
Info (21057): Implemented 7502 device resources after synthesis - the final resource count might be different
    Info (21058): Implemented 146 input pins
    Info (21059): Implemented 60 output pins
    Info (21060): Implemented 35 bidirectional pins
    Info (21061): Implemented 6845 logic cells
    Info (21064): Implemented 402 RAM segments
    Info (21065): Implemented 3 PLLs
    Info (21071): Implemented 1 partitions
Info: Quartus II 64-Bit Analysis & Synthesis was successful. 0 errors, 87 warnings
    Info: Peak virtual memory: 1157 megabytes
    Info: Processing ended: Fri Apr 28 07:34:35 2017
    Info: Elapsed time: 00:00:48
    Info: Total CPU time (on all processors): 00:00:46


