MORE INFORMATION





Cobham Gaisler AB

GRGPIO

The general purpose input output port core is a scalable and provides optional interrupt support. The port width can be configured to 2-32 bits.

Each bit in the general purpose input output port can be individually set to input or output, and can optionally generate an interrupt. For interrupt generation, the input can be filtered for polarity and level/edge detection.

It is possible to share GPIO pins with other signals. The output register can then be bypassed through the bypass register.


The estimated resource utilization of the GRGPIO is:

4-LUT
DFF
X-LUT
CARRY
MEMORYBLOCK
147
64
0
0
0


The following is a summary of the features:
  • Configurable number of I/Os
  • I/Os individually configurable to input or output
  • Configurable interrupt generation
  • Three modes of interrupt generation: single interrupt for all I/Os, one interrupt line per I/O, or dynamically mapping of I/Os to interrupt lines
  • Support for pin sharing





  • Cobham Gaisler AB
    Kungsgatan 12, 411 19 Gothenburg, Sweden
    sales@gaisler.com