Cobham Gaisler AB
SPIMCTRL
The core maps a memory device connected via the Serial Peripheral Interface (SPI) into AMBA address space. Read accesses are performed by performing normal AMBA read operations in the mapped memory area. Other operations, such as writes, are performed by directly sending SPI commands to the memory device via the core’s register interface. The core is highly configurable and sup- ports most SPI Flash memory devices.
The estimated resource utilization of the SPIMCTRL is:
The following is a summary of the features:
- Maps a SPI memory in AMBA address space
- Supports a wide range of memory devices
- Support for address offset to only access upper part of a memory device